| cluster.py (9815:3b3b94536547) | cluster.py (10405:7a618c07e663) |
|---|---|
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 157 unchanged lines hidden (view full) --- 166all_cpus = [] 167all_l1s = [] 168all_l1buses = [] 169if options.timing: 170 clusters = [ Cluster() for i in xrange(options.numclusters)] 171 for j in xrange(options.numclusters): 172 clusters[j].id = j 173 for cluster in clusters: | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 157 unchanged lines hidden (view full) --- 166all_cpus = [] 167all_l1s = [] 168all_l1buses = [] 169if options.timing: 170 clusters = [ Cluster() for i in xrange(options.numclusters)] 171 for j in xrange(options.numclusters): 172 clusters[j].id = j 173 for cluster in clusters: |
| 174 cluster.clusterbus = CoherentBus(clock=busFrequency) | 174 cluster.clusterbus = CoherentXBar(clock=busFrequency) |
| 175 all_l1buses += [cluster.clusterbus] 176 cluster.cpus = [TimingSimpleCPU(cpu_id = i + cluster.id, 177 clock=options.frequency) 178 for i in xrange(cpusPerCluster)] 179 all_cpus += cluster.cpus 180 cluster.l1 = L1(size=options.l1size, assoc = 4) 181 all_l1s += [cluster.l1] 182elif options.detailed: 183 clusters = [ Cluster() for i in xrange(options.numclusters)] 184 for j in xrange(options.numclusters): 185 clusters[j].id = j 186 for cluster in clusters: | 175 all_l1buses += [cluster.clusterbus] 176 cluster.cpus = [TimingSimpleCPU(cpu_id = i + cluster.id, 177 clock=options.frequency) 178 for i in xrange(cpusPerCluster)] 179 all_cpus += cluster.cpus 180 cluster.l1 = L1(size=options.l1size, assoc = 4) 181 all_l1s += [cluster.l1] 182elif options.detailed: 183 clusters = [ Cluster() for i in xrange(options.numclusters)] 184 for j in xrange(options.numclusters): 185 clusters[j].id = j 186 for cluster in clusters: |
| 187 cluster.clusterbus = CoherentBus(clock=busFrequency) | 187 cluster.clusterbus = CoherentXBar(clock=busFrequency) |
| 188 all_l1buses += [cluster.clusterbus] 189 cluster.cpus = [DerivO3CPU(cpu_id = i + cluster.id, 190 clock=options.frequency) 191 for i in xrange(cpusPerCluster)] 192 all_cpus += cluster.cpus 193 cluster.l1 = L1(size=options.l1size, assoc = 4) 194 all_l1s += [cluster.l1] 195else: 196 clusters = [ Cluster() for i in xrange(options.numclusters)] 197 for j in xrange(options.numclusters): 198 clusters[j].id = j 199 for cluster in clusters: | 188 all_l1buses += [cluster.clusterbus] 189 cluster.cpus = [DerivO3CPU(cpu_id = i + cluster.id, 190 clock=options.frequency) 191 for i in xrange(cpusPerCluster)] 192 all_cpus += cluster.cpus 193 cluster.l1 = L1(size=options.l1size, assoc = 4) 194 all_l1s += [cluster.l1] 195else: 196 clusters = [ Cluster() for i in xrange(options.numclusters)] 197 for j in xrange(options.numclusters): 198 clusters[j].id = j 199 for cluster in clusters: |
| 200 cluster.clusterbus = CoherentBus(clock=busFrequency) | 200 cluster.clusterbus = CoherentXBar(clock=busFrequency) |
| 201 all_l1buses += [cluster.clusterbus] 202 cluster.cpus = [AtomicSimpleCPU(cpu_id = i + cluster.id, 203 clock=options.frequency) 204 for i in xrange(cpusPerCluster)] 205 all_cpus += cluster.cpus 206 cluster.l1 = L1(size=options.l1size, assoc = 4) 207 all_l1s += [cluster.l1] 208 209# ---------------------- 210# Create a system, and add system wide objects 211# ---------------------- 212system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, 213 physmem = SimpleMemory(), | 201 all_l1buses += [cluster.clusterbus] 202 cluster.cpus = [AtomicSimpleCPU(cpu_id = i + cluster.id, 203 clock=options.frequency) 204 for i in xrange(cpusPerCluster)] 205 all_cpus += cluster.cpus 206 cluster.l1 = L1(size=options.l1size, assoc = 4) 207 all_l1s += [cluster.l1] 208 209# ---------------------- 210# Create a system, and add system wide objects 211# ---------------------- 212system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, 213 physmem = SimpleMemory(), |
| 214 membus = CoherentBus(clock = busFrequency)) | 214 membus = CoherentXBar(clock = busFrequency)) |
| 215system.clock = '1GHz' 216 | 215system.clock = '1GHz' 216 |
| 217system.toL2bus = CoherentBus(clock = busFrequency) | 217system.toL2bus = CoherentXBar(clock = busFrequency) |
| 218system.l2 = L2(size = options.l2size, assoc = 8) 219 220# ---------------------- 221# Connect the L2 cache and memory together 222# ---------------------- 223 224system.physmem.port = system.membus.master 225system.l2.cpu_side = system.toL2bus.slave --- 78 unchanged lines hidden --- | 218system.l2 = L2(size = options.l2size, assoc = 8) 219 220# ---------------------- 221# Connect the L2 cache and memory together 222# ---------------------- 223 224system.physmem.port = system.membus.master 225system.l2.cpu_side = system.toL2bus.slave --- 78 unchanged lines hidden --- |