| cluster.py (9036:6385cf85bf12) | cluster.py (9790:ccc428657233) |
|---|---|
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 200 unchanged lines hidden (view full) --- 209 all_l1s += [cluster.l1] 210 211# ---------------------- 212# Create a system, and add system wide objects 213# ---------------------- 214system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, 215 physmem = SimpleMemory(), 216 membus = CoherentBus(clock = busFrequency)) | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 200 unchanged lines hidden (view full) --- 209 all_l1s += [cluster.l1] 210 211# ---------------------- 212# Create a system, and add system wide objects 213# ---------------------- 214system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, 215 physmem = SimpleMemory(), 216 membus = CoherentBus(clock = busFrequency)) |
| 217system.clock = '1GHz' |
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| 217 218system.toL2bus = CoherentBus(clock = busFrequency) 219system.l2 = L2(size = options.l2size, assoc = 8) 220 221# ---------------------- 222# Connect the L2 cache and memory together 223# ---------------------- 224 --- 80 unchanged lines hidden --- | 218 219system.toL2bus = CoherentBus(clock = busFrequency) 220system.l2 = L2(size = options.l2size, assoc = 8) 221 222# ---------------------- 223# Connect the L2 cache and memory together 224# ---------------------- 225 --- 80 unchanged lines hidden --- |