1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 86 unchanged lines hidden (view full) --- 95 This is a wrapper for the legacy topologies. 96 """ 97 exec "import %s as Topo" % options.topology 98 topology = eval("Topo.%s(controllers)" % options.topology) 99 return topology 100 101def create_system(options, system, piobus = None, dma_ports = []): 102 |
103 system.ruby = RubySystem(no_mem_vec = options.use_map) |
104 ruby = system.ruby 105 106 protocol = buildEnv['PROTOCOL'] 107 exec "import %s" % protocol 108 try: 109 (cpu_sequencers, dir_cntrls, topology) = \ 110 eval("%s.create_system(options, system, piobus, dma_ports, ruby)" 111 % protocol) --- 68 unchanged lines hidden (view full) --- 180 181 for dir_cntrl in dir_cntrls: 182 total_mem_size.value += dir_cntrl.directory.size.value 183 dir_cntrl.directory.numa_high_bit = numa_bit 184 185 phys_mem_size = sum(map(lambda r: r.size(), system.mem_ranges)) 186 assert(total_mem_size.value == phys_mem_size) 187 |
188 ruby.network = network |
189 ruby.mem_size = total_mem_size 190 ruby._cpu_ruby_ports = cpu_sequencers |
191 ruby.num_of_sequencers = len(cpu_sequencers) |
192 ruby.random_seed = options.random_seed |