MOESI_hammer.py (9468:721718c62859) MOESI_hammer.py (9697:f037e7b4a827)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 86 unchanged lines hidden (view full) ---

95 assoc = options.l1d_assoc,
96 start_index_bit = block_size_bits)
97 l2_cache = L2Cache(size = options.l2_size,
98 assoc = options.l2_assoc,
99 start_index_bit = block_size_bits)
100
101 l1_cntrl = L1Cache_Controller(version = i,
102 cntrl_id = cntrl_count,
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 86 unchanged lines hidden (view full) ---

95 assoc = options.l1d_assoc,
96 start_index_bit = block_size_bits)
97 l2_cache = L2Cache(size = options.l2_size,
98 assoc = options.l2_assoc,
99 start_index_bit = block_size_bits)
100
101 l1_cntrl = L1Cache_Controller(version = i,
102 cntrl_id = cntrl_count,
103 L1IcacheMemory = l1i_cache,
104 L1DcacheMemory = l1d_cache,
105 L2cacheMemory = l2_cache,
103 L1Icache = l1i_cache,
104 L1Dcache = l1d_cache,
105 L2cache = l2_cache,
106 no_mig_atomic = not \
107 options.allow_atomic_migration,
108 send_evictions = (
109 options.cpu_type == "detailed"),
110 ruby_system = ruby_system)
111
112 cpu_seq = RubySequencer(version = i,
113 icache = l1i_cache,

--- 112 unchanged lines hidden ---
106 no_mig_atomic = not \
107 options.allow_atomic_migration,
108 send_evictions = (
109 options.cpu_type == "detailed"),
110 ruby_system = ruby_system)
111
112 cpu_seq = RubySequencer(version = i,
113 icache = l1i_cache,

--- 112 unchanged lines hidden ---