MOESI_hammer.py (8923:820111f58fbb) | MOESI_hammer.py (8929:4148f9af0b70) |
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1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 44 unchanged lines hidden (view full) --- 53def define_options(parser): 54 parser.add_option("--allow-atomic-migration", action="store_true", 55 help="allow migratory sharing for atomic only accessed blocks") 56 parser.add_option("--pf-on", action="store_true", 57 help="Hammer: enable Probe Filter") 58 parser.add_option("--dir-on", action="store_true", 59 help="Hammer: enable Full-bit Directory") 60 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 44 unchanged lines hidden (view full) --- 53def define_options(parser): 54 parser.add_option("--allow-atomic-migration", action="store_true", 55 help="allow migratory sharing for atomic only accessed blocks") 56 parser.add_option("--pf-on", action="store_true", 57 help="Hammer: enable Probe Filter") 58 parser.add_option("--dir-on", action="store_true", 59 help="Hammer: enable Full-bit Directory") 60 |
61def create_system(options, system, piobus, dma_devices, ruby_system): | 61def create_system(options, system, piobus, dma_ports, ruby_system): |
62 63 if buildEnv['PROTOCOL'] != 'MOESI_hammer': 64 panic("This script requires the MOESI_hammer protocol to be built.") 65 66 cpu_sequencers = [] 67 68 # 69 # The ruby network creation expects the list of nodes in the system to be --- 120 unchanged lines hidden (view full) --- 190 if options.recycle_latency: 191 dir_cntrl.recycle_latency = options.recycle_latency 192 193 exec("system.dir_cntrl%d = dir_cntrl" % i) 194 dir_cntrl_nodes.append(dir_cntrl) 195 196 cntrl_count += 1 197 | 62 63 if buildEnv['PROTOCOL'] != 'MOESI_hammer': 64 panic("This script requires the MOESI_hammer protocol to be built.") 65 66 cpu_sequencers = [] 67 68 # 69 # The ruby network creation expects the list of nodes in the system to be --- 120 unchanged lines hidden (view full) --- 190 if options.recycle_latency: 191 dir_cntrl.recycle_latency = options.recycle_latency 192 193 exec("system.dir_cntrl%d = dir_cntrl" % i) 194 dir_cntrl_nodes.append(dir_cntrl) 195 196 cntrl_count += 1 197 |
198 for i, dma_device in enumerate(dma_devices): | 198 for i, dma_port in enumerate(dma_ports): |
199 # 200 # Create the Ruby objects associated with the dma controller 201 # 202 dma_seq = DMASequencer(version = i, 203 ruby_system = ruby_system) 204 205 dma_cntrl = DMA_Controller(version = i, 206 cntrl_id = cntrl_count, 207 dma_sequencer = dma_seq, 208 ruby_system = ruby_system) 209 210 exec("system.dma_cntrl%d = dma_cntrl" % i) | 199 # 200 # Create the Ruby objects associated with the dma controller 201 # 202 dma_seq = DMASequencer(version = i, 203 ruby_system = ruby_system) 204 205 dma_cntrl = DMA_Controller(version = i, 206 cntrl_id = cntrl_count, 207 dma_sequencer = dma_seq, 208 ruby_system = ruby_system) 209 210 exec("system.dma_cntrl%d = dma_cntrl" % i) |
211 if dma_device.type == 'MemTest': 212 exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i) 213 else: 214 exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i) | 211 exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) |
215 dma_cntrl_nodes.append(dma_cntrl) 216 217 if options.recycle_latency: 218 dma_cntrl.recycle_latency = options.recycle_latency 219 220 cntrl_count += 1 221 222 all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes 223 224 return (cpu_sequencers, dir_cntrl_nodes, all_cntrls) | 212 dma_cntrl_nodes.append(dma_cntrl) 213 214 if options.recycle_latency: 215 dma_cntrl.recycle_latency = options.recycle_latency 216 217 cntrl_count += 1 218 219 all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes 220 221 return (cpu_sequencers, dir_cntrl_nodes, all_cntrls) |