MOESI_hammer.py (10311:ad9c042dce54) MOESI_hammer.py (10440:1e3497e20cd4)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 225 unchanged lines hidden (view full) ---

234 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i)
235 exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
236 dma_cntrl_nodes.append(dma_cntrl)
237
238 if options.recycle_latency:
239 dma_cntrl.recycle_latency = options.recycle_latency
240
241 # Connect the dma controller to the network
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 225 unchanged lines hidden (view full) ---

234 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i)
235 exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
236 dma_cntrl_nodes.append(dma_cntrl)
237
238 if options.recycle_latency:
239 dma_cntrl.recycle_latency = options.recycle_latency
240
241 # Connect the dma controller to the network
242 dma_cntrl.responseFromDir = ruby_system.network.slave
243 dma_cntrl.requestToDir = ruby_system.network.master
242 dma_cntrl.responseFromDir = ruby_system.network.master
243 dma_cntrl.requestToDir = ruby_system.network.slave
244
245
246 all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
247 topology = create_topology(all_cntrls, options)
248 return (cpu_sequencers, dir_cntrl_nodes, topology)
244
245
246 all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
247 topology = create_topology(all_cntrls, options)
248 return (cpu_sequencers, dir_cntrl_nodes, topology)