1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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153 # set the probe filter start bit to just above the block offset
154 pf_start_bit = block_size_bits
155 else:
156 if dir_bits > 0:
157 pf_start_bit = dir_bits + block_size_bits - 1
158 else:
159 pf_start_bit = block_size_bits
160
161 # Run each of the ruby memory controllers at a ratio of the frequency of
162 # the ruby system
163 # clk_divider value is a fix to pass regression.
164 ruby_system.memctrl_clk_domain = DerivedClockDomain(
165 clk_domain=ruby_system.clk_domain,
166 clk_divider=3)
167
168 for i in xrange(options.num_dirs):
169 #
170 # Create the Ruby objects associated with the directory controller
171 #
172
173 mem_cntrl = RubyMemoryControl(
174 clk_domain = ruby_system.memctrl_clk_domain,
175 version = i,
176 ruby_system = ruby_system)
177
178 dir_size = MemorySize('0B')
179 dir_size.value = mem_module_size
180
181 pf = ProbeFilter(size = pf_size, assoc = 4,
182 start_index_bit = pf_start_bit)
183
184 dir_cntrl = Directory_Controller(version = i,

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