MOESI_CMP_token.py (10006:8fa94dcfd545) MOESI_CMP_token.py (10092:c0db268f811b)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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117 cpu_seq = RubySequencer(version = i,
118 icache = l1i_cache,
119 dcache = l1d_cache,
120 ruby_system = ruby_system)
121
122 l1_cntrl.sequencer = cpu_seq
123
124 if piobus != None:
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 108 unchanged lines hidden (view full) ---

117 cpu_seq = RubySequencer(version = i,
118 icache = l1i_cache,
119 dcache = l1d_cache,
120 ruby_system = ruby_system)
121
122 l1_cntrl.sequencer = cpu_seq
123
124 if piobus != None:
125 cpu_seq.pio_port = piobus.slave
125 cpu_seq.pio_master_port = piobus.slave
126 cpu_seq.mem_master_port = piobus.slave
127 cpu_seq.pio_slave_port = piobus.master
126
127 exec("ruby_system.l1_cntrl%d = l1_cntrl" % i)
128 #
129 # Add controllers and sequencers to the appropriate lists
130 #
131 cpu_sequencers.append(cpu_seq)
132 l1_cntrl_nodes.append(l1_cntrl)
133

--- 80 unchanged lines hidden --- 		128
129 exec("ruby_system.l1_cntrl%d = l1_cntrl" % i)
130 #
131 # Add controllers and sequencers to the appropriate lists
132 #
133 cpu_sequencers.append(cpu_seq)
134 l1_cntrl_nodes.append(l1_cntrl)
135

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