1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 41 unchanged lines hidden (view full) --- 50 help="Token_CMP: # of l1 retries before going persistent") 51 parser.add_option("--timeout-latency", type="int", default=300, 52 help="Token_CMP: cycles until issuing again"); 53 parser.add_option("--disable-dyn-timeouts", action="store_true", 54 help="Token_CMP: disable dyanimc timeouts, use fixed latency instead") 55 parser.add_option("--allow-atomic-migration", action="store_true", 56 help="allow migratory sharing for atomic only accessed blocks") 57 |
58def create_system(options, system, dma_ports, ruby_system): |
59 60 if buildEnv['PROTOCOL'] != 'MOESI_CMP_token': 61 panic("This script requires the MOESI_CMP_token protocol to be built.") 62 63 # 64 # number of tokens that the owner passes to requests so that shared blocks can 65 # respond to read requests 66 # --- 48 unchanged lines hidden (view full) --- 115 ruby_system = ruby_system) 116 117 cpu_seq = RubySequencer(version = i, 118 icache = l1i_cache, 119 dcache = l1d_cache, 120 ruby_system = ruby_system) 121 122 l1_cntrl.sequencer = cpu_seq |
123 exec("ruby_system.l1_cntrl%d = l1_cntrl" % i) |
124 |
125 # 126 # Add controllers and sequencers to the appropriate lists 127 # 128 cpu_sequencers.append(cpu_seq) 129 l1_cntrl_nodes.append(l1_cntrl) 130 131 l2_index_start = block_size_bits + l2_bits 132 --- 78 unchanged lines hidden --- |