94,110c94,104
< l1_cntrl = L1Cache_Controller(version = i,
< L1Icache = l1i_cache,
< L1Dcache = l1d_cache,
< l2_select_num_bits = l2_bits,
< N_tokens = n_tokens,
< retry_threshold = \
< options.l1_retries,
< fixed_timeout_latency = \
< options.timeout_latency,
< dynamic_timeout_enabled = \
< not options.disable_dyn_timeouts,
< no_mig_atomic = not \
< options.allow_atomic_migration,
< send_evictions = send_evicts(options),
< transitions_per_cycle = options.ports,
< clk_domain=system.cpu[i].clk_domain,
< ruby_system = ruby_system)
---
> # the ruby random tester reuses num_cpus to specify the
> # number of cpu ports connected to the tester object, which
> # is stored in system.cpu. because there is only ever one
> # tester object, num_cpus is not necessarily equal to the
> # size of system.cpu; therefore if len(system.cpu) == 1
> # we use system.cpu[0] to set the clk_domain, thereby ensuring
> # we don't index off the end of the cpu list.
> if len(system.cpu) == 1:
> clk_domain = system.cpu[0].clk_domain
> else:
> clk_domain = system.cpu[i].clk_domain
112,116c106,120
< cpu_seq = RubySequencer(version = i,
< icache = l1i_cache,
< dcache = l1d_cache,
< clk_domain=system.cpu[i].clk_domain,
< ruby_system = ruby_system)
---
> l1_cntrl = L1Cache_Controller(version=i, L1Icache=l1i_cache,
> L1Dcache=l1d_cache,
> l2_select_num_bits=l2_bits,
> N_tokens=n_tokens,
> retry_threshold=options.l1_retries,
> fixed_timeout_latency=\
> options.timeout_latency,
> dynamic_timeout_enabled=\
> not options.disable_dyn_timeouts,
> no_mig_atomic=not \
> options.allow_atomic_migration,
> send_evictions=send_evicts(options),
> transitions_per_cycle=options.ports,
> clk_domain=clk_domain,
> ruby_system=ruby_system)
117a122,125
> cpu_seq = RubySequencer(version=i, icache=l1i_cache,
> dcache=l1d_cache, clk_domain=clk_domain,
> ruby_system=ruby_system)
>