MI_example.py (12976:125099a94768) MI_example.py (13731:67cd980cb20f)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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59 dma_cntrl_nodes = []
60
61 #
62 # Must create the individual controllers before the network to ensure the
63 # controller constructors are called before the network constructor
64 #
65 block_size_bits = int(math.log(options.cacheline_size, 2))
66
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

--- 50 unchanged lines hidden (view full) ---

59 dma_cntrl_nodes = []
60
61 #
62 # Must create the individual controllers before the network to ensure the
63 # controller constructors are called before the network constructor
64 #
65 block_size_bits = int(math.log(options.cacheline_size, 2))
66
67 for i in xrange(options.num_cpus):
67 for i in range(options.num_cpus):
68 #
69 # First create the Ruby objects associated with this cpu
70 # Only one cache exists for this protocol, so by default use the L1D
71 # config parameters.
72 #
73 cache = L1Cache(size = options.l1d_size,
74 assoc = options.l1d_assoc,
75 start_index_bit = block_size_bits)

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68 #
69 # First create the Ruby objects associated with this cpu
70 # Only one cache exists for this protocol, so by default use the L1D
71 # config parameters.
72 #
73 cache = L1Cache(size = options.l1d_size,
74 assoc = options.l1d_assoc,
75 start_index_bit = block_size_bits)

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