1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 17 unchanged lines hidden (view full) --- 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Brad Beckmann 29 30import math 31import m5 32from m5.objects import * 33from m5.defines import buildEnv |
34from Ruby import create_topology, create_directories |
35from Ruby import send_evicts 36 37# 38# Declare caches used by the protocol 39# 40class L1Cache(RubyCache): pass 41class L2Cache(RubyCache): pass 42 --- 9 unchanged lines hidden (view full) --- 52 53 # 54 # The ruby network creation expects the list of nodes in the system to be 55 # consistent with the NetDest list. Therefore the l1 controller nodes must be 56 # listed before the directory nodes and directory nodes before dma nodes, etc. 57 # 58 l1_cntrl_nodes = [] 59 l2_cntrl_nodes = [] |
60 dma_cntrl_nodes = [] 61 62 # 63 # Must create the individual controllers before the network to ensure the 64 # controller constructors are called before the network constructor 65 # 66 l2_bits = int(math.log(options.num_l2caches, 2)) 67 block_size_bits = int(math.log(options.cacheline_size, 2)) --- 93 unchanged lines hidden (view full) --- 161 l2_cntrl.unblockToL2Cache = MessageBuffer() 162 l2_cntrl.unblockToL2Cache.slave = ruby_system.network.master 163 l2_cntrl.L1RequestToL2Cache = MessageBuffer() 164 l2_cntrl.L1RequestToL2Cache.slave = ruby_system.network.master 165 l2_cntrl.responseToL2Cache = MessageBuffer() 166 l2_cntrl.responseToL2Cache.slave = ruby_system.network.master 167 168 |
169 # Run each of the ruby memory controllers at a ratio of the frequency of 170 # the ruby system 171 # clk_divider value is a fix to pass regression. 172 ruby_system.memctrl_clk_domain = DerivedClockDomain( 173 clk_domain = ruby_system.clk_domain, 174 clk_divider = 3) 175 |
176 dir_cntrl_nodes = create_directories(options, system.mem_ranges, 177 ruby_system) 178 for dir_cntrl in dir_cntrl_nodes: |
179 # Connect the directory controllers and the network 180 dir_cntrl.requestToDir = MessageBuffer() 181 dir_cntrl.requestToDir.slave = ruby_system.network.master 182 dir_cntrl.responseToDir = MessageBuffer() 183 dir_cntrl.responseToDir.slave = ruby_system.network.master 184 dir_cntrl.responseFromDir = MessageBuffer() 185 dir_cntrl.responseFromDir.master = ruby_system.network.slave 186 dir_cntrl.responseFromMemory = MessageBuffer() --- 48 unchanged lines hidden --- |