MESI_Two_Level.py (10311:ad9c042dce54) | MESI_Two_Level.py (10519:7a3ad4b09ce4) |
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1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 34 unchanged lines hidden (view full) --- 43# Note: the L2 Cache latency is not currently used 44# 45class L2Cache(RubyCache): 46 latency = 15 47 48def define_options(parser): 49 return 50 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 34 unchanged lines hidden (view full) --- 43# Note: the L2 Cache latency is not currently used 44# 45class L2Cache(RubyCache): 46 latency = 15 47 48def define_options(parser): 49 return 50 |
51def create_system(options, system, dma_ports, ruby_system): | 51def create_system(options, full_system, system, dma_ports, ruby_system): |
52 53 if buildEnv['PROTOCOL'] != 'MESI_Two_Level': 54 fatal("This script requires the MESI_Two_Level protocol to be built.") 55 56 cpu_sequencers = [] 57 58 # 59 # The ruby network creation expects the list of nodes in the system to be --- 131 unchanged lines hidden (view full) --- 191 dir_cntrl.requestToDir = ruby_system.network.master 192 dir_cntrl.responseToDir = ruby_system.network.master 193 dir_cntrl.responseFromDir = ruby_system.network.slave 194 195 196 for i, dma_port in enumerate(dma_ports): 197 # Create the Ruby objects associated with the dma controller 198 dma_seq = DMASequencer(version = i, | 52 53 if buildEnv['PROTOCOL'] != 'MESI_Two_Level': 54 fatal("This script requires the MESI_Two_Level protocol to be built.") 55 56 cpu_sequencers = [] 57 58 # 59 # The ruby network creation expects the list of nodes in the system to be --- 131 unchanged lines hidden (view full) --- 191 dir_cntrl.requestToDir = ruby_system.network.master 192 dir_cntrl.responseToDir = ruby_system.network.master 193 dir_cntrl.responseFromDir = ruby_system.network.slave 194 195 196 for i, dma_port in enumerate(dma_ports): 197 # Create the Ruby objects associated with the dma controller 198 dma_seq = DMASequencer(version = i, |
199 ruby_system = ruby_system) | 199 ruby_system = ruby_system, 200 slave = dma_port) |
200 201 dma_cntrl = DMA_Controller(version = i, 202 dma_sequencer = dma_seq, 203 transitions_per_cycle = options.ports, 204 ruby_system = ruby_system) 205 206 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) | 201 202 dma_cntrl = DMA_Controller(version = i, 203 dma_sequencer = dma_seq, 204 transitions_per_cycle = options.ports, 205 ruby_system = ruby_system) 206 207 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) |
207 exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) | |
208 dma_cntrl_nodes.append(dma_cntrl) 209 210 # Connect the dma controller to the network 211 dma_cntrl.responseFromDir = ruby_system.network.master 212 dma_cntrl.requestToDir = ruby_system.network.slave 213 | 208 dma_cntrl_nodes.append(dma_cntrl) 209 210 # Connect the dma controller to the network 211 dma_cntrl.responseFromDir = ruby_system.network.master 212 dma_cntrl.requestToDir = ruby_system.network.slave 213 |
214 | |
215 all_cntrls = l1_cntrl_nodes + \ 216 l2_cntrl_nodes + \ 217 dir_cntrl_nodes + \ 218 dma_cntrl_nodes 219 | 214 all_cntrls = l1_cntrl_nodes + \ 215 l2_cntrl_nodes + \ 216 dir_cntrl_nodes + \ 217 dma_cntrl_nodes 218 |
220 topology = create_topology(all_cntrls, options) | 219 # Create the io controller and the sequencer 220 if full_system: 221 io_seq = DMASequencer(version=len(dma_ports), ruby_system=ruby_system) 222 ruby_system._io_port = io_seq 223 io_controller = DMA_Controller(version = len(dma_ports), 224 dma_sequencer = io_seq, 225 ruby_system = ruby_system) 226 ruby_system.io_controller = io_controller |
221 | 227 |
228 # Connect the dma controller to the network 229 io_controller.responseFromDir = ruby_system.network.master 230 io_controller.requestToDir = ruby_system.network.slave 231 232 all_cntrls = all_cntrls + [io_controller] 233 234 topology = create_topology(all_cntrls, options) |
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222 return (cpu_sequencers, dir_cntrl_nodes, topology) | 235 return (cpu_sequencers, dir_cntrl_nodes, topology) |