| MESI_Three_Level.py (10529:05b5a6cf3521) | MESI_Three_Level.py (10652:e5936c2d53a0) |
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| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# Copyright (c) 2013 Mark D. Hill and David A. Wood 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 202 unchanged lines hidden (view full) --- 211 dma_sequencer = dma_seq, 212 transitions_per_cycle = options.ports, 213 ruby_system = ruby_system) 214 215 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) 216 exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) 217 dma_cntrl_nodes.append(dma_cntrl) 218 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# Copyright (c) 2013 Mark D. Hill and David A. Wood 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 202 unchanged lines hidden (view full) --- 211 dma_sequencer = dma_seq, 212 transitions_per_cycle = options.ports, 213 ruby_system = ruby_system) 214 215 exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) 216 exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) 217 dma_cntrl_nodes.append(dma_cntrl) 218 |
| 219 # Connect the dma controller to the network 220 dma_cntrl.responseFromDir = ruby_system.network.master 221 dma_cntrl.requestToDir = ruby_system.network.slave 222 |
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| 219 all_cntrls = l0_cntrl_nodes + \ 220 l1_cntrl_nodes + \ 221 l2_cntrl_nodes + \ 222 dir_cntrl_nodes + \ 223 dma_cntrl_nodes 224 225 # Create the io controller and the sequencer 226 if full_system: --- 15 unchanged lines hidden --- | 223 all_cntrls = l0_cntrl_nodes + \ 224 l1_cntrl_nodes + \ 225 l2_cntrl_nodes + \ 226 dir_cntrl_nodes + \ 227 dma_cntrl_nodes 228 229 # Create the io controller and the sequencer 230 if full_system: --- 15 unchanged lines hidden --- |