GPU_VIPER_Region.py (13400:cf74d21e948f) | GPU_VIPER_Region.py (13731:67cd980cb20f) |
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1# Copyright (c) 2015 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# For use for simulation and test purposes only 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are met: 8# --- 455 unchanged lines hidden (view full) --- 464 # 465 # Must create the individual controllers before the network to ensure the 466 # controller constructors are called before the network constructor 467 # 468 469 # For an odd number of CPUs, still create the right number of controllers 470 crossbar_bw = 16 * options.num_compute_units #Assuming a 2GHz clock 471 cpuCluster = Cluster(extBW = (crossbar_bw), intBW=crossbar_bw) | 1# Copyright (c) 2015 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# For use for simulation and test purposes only 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are met: 8# --- 455 unchanged lines hidden (view full) --- 464 # 465 # Must create the individual controllers before the network to ensure the 466 # controller constructors are called before the network constructor 467 # 468 469 # For an odd number of CPUs, still create the right number of controllers 470 crossbar_bw = 16 * options.num_compute_units #Assuming a 2GHz clock 471 cpuCluster = Cluster(extBW = (crossbar_bw), intBW=crossbar_bw) |
472 for i in xrange((options.num_cpus + 1) / 2): | 472 for i in range((options.num_cpus + 1) // 2): |
473 474 cp_cntrl = CPCntrl() 475 cp_cntrl.create(options, ruby_system, system) 476 477 rb_cntrl = RBCntrl() 478 rb_cntrl.create(options, ruby_system, system) 479 rb_cntrl.number_of_TBEs = 256 480 rb_cntrl.isOnCPU = True --- 49 unchanged lines hidden (view full) --- 530 rb_cntrl.responseToRegDir.master = ruby_system.network.slave 531 532 rb_cntrl.triggerQueue = MessageBuffer(ordered = True) 533 534 cpuCluster.add(cp_cntrl) 535 cpuCluster.add(rb_cntrl) 536 537 gpuCluster = Cluster(extBW = (crossbar_bw), intBW = crossbar_bw) | 473 474 cp_cntrl = CPCntrl() 475 cp_cntrl.create(options, ruby_system, system) 476 477 rb_cntrl = RBCntrl() 478 rb_cntrl.create(options, ruby_system, system) 479 rb_cntrl.number_of_TBEs = 256 480 rb_cntrl.isOnCPU = True --- 49 unchanged lines hidden (view full) --- 530 rb_cntrl.responseToRegDir.master = ruby_system.network.slave 531 532 rb_cntrl.triggerQueue = MessageBuffer(ordered = True) 533 534 cpuCluster.add(cp_cntrl) 535 cpuCluster.add(rb_cntrl) 536 537 gpuCluster = Cluster(extBW = (crossbar_bw), intBW = crossbar_bw) |
538 for i in xrange(options.num_compute_units): | 538 for i in range(options.num_compute_units): |
539 540 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 541 issue_latency = 1, 542 number_of_TBEs = 2560) 543 # TBEs set to max outstanding requests 544 tcp_cntrl.create(options, ruby_system, system) 545 tcp_cntrl.WB = options.WB_L1 546 tcp_cntrl.disableL1 = False --- 19 unchanged lines hidden (view full) --- 566 567 tcp_cntrl.responseToTCP = MessageBuffer(ordered = True) 568 tcp_cntrl.responseToTCP.slave = ruby_system.network.master 569 570 tcp_cntrl.mandatoryQueue = MessageBuffer() 571 572 gpuCluster.add(tcp_cntrl) 573 | 539 540 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 541 issue_latency = 1, 542 number_of_TBEs = 2560) 543 # TBEs set to max outstanding requests 544 tcp_cntrl.create(options, ruby_system, system) 545 tcp_cntrl.WB = options.WB_L1 546 tcp_cntrl.disableL1 = False --- 19 unchanged lines hidden (view full) --- 566 567 tcp_cntrl.responseToTCP = MessageBuffer(ordered = True) 568 tcp_cntrl.responseToTCP.slave = ruby_system.network.master 569 570 tcp_cntrl.mandatoryQueue = MessageBuffer() 571 572 gpuCluster.add(tcp_cntrl) 573 |
574 for i in xrange(options.num_sqc): | 574 for i in range(options.num_sqc): |
575 576 sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits) 577 sqc_cntrl.create(options, ruby_system, system) 578 579 exec("system.sqc_cntrl%d = sqc_cntrl" % i) 580 # 581 # Add controllers and sequencers to the appropriate lists 582 # --- 11 unchanged lines hidden (view full) --- 594 595 sqc_cntrl.mandatoryQueue = MessageBuffer() 596 597 # SQC also in GPU cluster 598 gpuCluster.add(sqc_cntrl) 599 600 numa_bit = 6 601 | 575 576 sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits) 577 sqc_cntrl.create(options, ruby_system, system) 578 579 exec("system.sqc_cntrl%d = sqc_cntrl" % i) 580 # 581 # Add controllers and sequencers to the appropriate lists 582 # --- 11 unchanged lines hidden (view full) --- 594 595 sqc_cntrl.mandatoryQueue = MessageBuffer() 596 597 # SQC also in GPU cluster 598 gpuCluster.add(sqc_cntrl) 599 600 numa_bit = 6 601 |
602 for i in xrange(options.num_tccs): | 602 for i in range(options.num_tccs): |
603 604 tcc_cntrl = TCCCntrl() 605 tcc_cntrl.create(options, ruby_system, system) 606 tcc_cntrl.l2_request_latency = 1 607 tcc_cntrl.l2_response_latency = options.TCC_latency 608 tcc_cntrl.WB = options.WB_L2 609 tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units 610 --- 150 unchanged lines hidden --- | 603 604 tcc_cntrl = TCCCntrl() 605 tcc_cntrl.create(options, ruby_system, system) 606 tcc_cntrl.l2_request_latency = 1 607 tcc_cntrl.l2_response_latency = options.TCC_latency 608 tcc_cntrl.WB = options.WB_L2 609 tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units 610 --- 150 unchanged lines hidden --- |