1# 2# Copyright (c) 2015 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# For use for simulation and test purposes only 6# 7# Redistribution and use in source and binary forms, with or without 8# modification, are permitted provided that the following conditions are met: 9# 10# 1. Redistributions of source code must retain the above copyright notice, 11# this list of conditions and the following disclaimer. 12# 13# 2. Redistributions in binary form must reproduce the above copyright notice, 14# this list of conditions and the following disclaimer in the documentation 15# and/or other materials provided with the distribution. 16# 17# 3. Neither the name of the copyright holder nor the names of its contributors 18# may be used to endorse or promote products derived from this software 19# without specific prior written permission. 20# 21# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31# POSSIBILITY OF SUCH DAMAGE. 32# 33# Author: Sooraj Puthoor 34# 35 36import math 37import m5 38from m5.objects import * 39from m5.defines import buildEnv 40from Ruby import send_evicts 41 42from topologies.Cluster import Cluster 43 44class CntrlBase: 45 _seqs = 0 46 @classmethod 47 def seqCount(cls): 48 # Use SeqCount not class since we need global count 49 CntrlBase._seqs += 1 50 return CntrlBase._seqs - 1 51 52 _cntrls = 0 53 @classmethod 54 def cntrlCount(cls): 55 # Use CntlCount not class since we need global count 56 CntrlBase._cntrls += 1 57 return CntrlBase._cntrls - 1 58 59 _version = 0 60 @classmethod 61 def versionCount(cls): 62 cls._version += 1 # Use count for this particular type 63 return cls._version - 1 64 65# 66# Note: the L1 Cache latency is only used by the sequencer on fast path hits 67# 68class L1Cache(RubyCache): 69 resourceStalls = False 70 dataArrayBanks = 2 71 tagArrayBanks = 2 72 dataAccessLatency = 1 73 tagAccessLatency = 1 74 def create(self, size, assoc, options): 75 self.size = MemorySize(size) 76 self.assoc = assoc 77 self.replacement_policy = PseudoLRUReplacementPolicy() 78 79class L2Cache(RubyCache): 80 resourceStalls = False 81 assoc = 16 82 dataArrayBanks = 16 83 tagArrayBanks = 16 84 def create(self, size, assoc, options): 85 self.size = MemorySize(size) 86 self.assoc = assoc 87 self.replacement_policy = PseudoLRUReplacementPolicy() 88 89class CPCntrl(CorePair_Controller, CntrlBase): 90 91 def create(self, options, ruby_system, system): 92 self.version = self.versionCount() 93 94 self.L1Icache = L1Cache() 95 self.L1Icache.create(options.l1i_size, options.l1i_assoc, options) 96 self.L1D0cache = L1Cache() 97 self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options) 98 self.L1D1cache = L1Cache() 99 self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options) 100 self.L2cache = L2Cache() 101 self.L2cache.create(options.l2_size, options.l2_assoc, options) 102 103 self.sequencer = RubySequencer() 104 self.sequencer.version = self.seqCount() 105 self.sequencer.icache = self.L1Icache 106 self.sequencer.dcache = self.L1D0cache 107 self.sequencer.ruby_system = ruby_system 108 self.sequencer.coreid = 0 109 self.sequencer.is_cpu_sequencer = True 110 111 self.sequencer1 = RubySequencer() 112 self.sequencer1.version = self.seqCount() 113 self.sequencer1.icache = self.L1Icache 114 self.sequencer1.dcache = self.L1D1cache 115 self.sequencer1.ruby_system = ruby_system 116 self.sequencer1.coreid = 1 117 self.sequencer1.is_cpu_sequencer = True 118 119 self.issue_latency = 1 120 self.send_evictions = send_evicts(options) 121 122 self.ruby_system = ruby_system 123 124 if options.recycle_latency: 125 self.recycle_latency = options.recycle_latency 126 127class TCPCache(RubyCache): 128 size = "16kB" 129 assoc = 16 130 dataArrayBanks = 16 131 tagArrayBanks = 16 132 dataAccessLatency = 4 133 tagAccessLatency = 1 134 def create(self, options): 135 self.size = MemorySize(options.tcp_size) 136 self.dataArrayBanks = 16 137 self.tagArrayBanks = 16 138 self.dataAccessLatency = 4 139 self.tagAccessLatency = 1 140 self.resourceStalls = options.no_tcc_resource_stalls 141 self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc) 142 143class TCPCntrl(TCP_Controller, CntrlBase): 144 145 def create(self, options, ruby_system, system): 146 self.version = self.versionCount() 147 self.L1cache = TCPCache(dataAccessLatency = options.TCP_latency) 148 self.L1cache.create(options) 149 self.issue_latency = 1 150 151 self.coalescer = VIPERCoalescer() 152 self.coalescer.version = self.seqCount() 153 self.coalescer.icache = self.L1cache 154 self.coalescer.dcache = self.L1cache 155 self.coalescer.ruby_system = ruby_system 156 self.coalescer.support_inst_reqs = False 157 self.coalescer.is_cpu_sequencer = False 158 159 self.sequencer = RubySequencer() 160 self.sequencer.version = self.seqCount() 161 self.sequencer.icache = self.L1cache 162 self.sequencer.dcache = self.L1cache 163 self.sequencer.ruby_system = ruby_system 164 self.sequencer.is_cpu_sequencer = True 165 166 self.use_seq_not_coal = False 167 168 self.ruby_system = ruby_system 169 if options.recycle_latency: 170 self.recycle_latency = options.recycle_latency 171 172class SQCCache(RubyCache): 173 dataArrayBanks = 8 174 tagArrayBanks = 8 175 dataAccessLatency = 1 176 tagAccessLatency = 1 177 178 def create(self, options): 179 self.size = MemorySize(options.sqc_size) 180 self.assoc = options.sqc_assoc 181 self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc) 182 183class SQCCntrl(SQC_Controller, CntrlBase): 184 185 def create(self, options, ruby_system, system): 186 self.version = self.versionCount() 187 self.L1cache = SQCCache() 188 self.L1cache.create(options) 189 self.L1cache.resourceStalls = False 190 self.sequencer = RubySequencer() 191 self.sequencer.version = self.seqCount() 192 self.sequencer.icache = self.L1cache 193 self.sequencer.dcache = self.L1cache 194 self.sequencer.ruby_system = ruby_system 195 self.sequencer.support_data_reqs = False 196 self.sequencer.is_cpu_sequencer = False 197 self.ruby_system = ruby_system 198 if options.recycle_latency: 199 self.recycle_latency = options.recycle_latency 200 201class TCC(RubyCache): 202 size = MemorySize("256kB") 203 assoc = 16 204 dataAccessLatency = 8 205 tagAccessLatency = 2 206 resourceStalls = False 207 def create(self, options): 208 self.assoc = options.tcc_assoc 209 if hasattr(options, 'bw_scalor') and options.bw_scalor > 0: 210 s = options.num_compute_units 211 tcc_size = s * 128 212 tcc_size = str(tcc_size)+'kB' 213 self.size = MemorySize(tcc_size) 214 self.dataArrayBanks = 64 215 self.tagArrayBanks = 64 216 else: 217 self.size = MemorySize(options.tcc_size) 218 self.dataArrayBanks = 256 / options.num_tccs #number of data banks 219 self.tagArrayBanks = 256 / options.num_tccs #number of tag banks 220 self.size.value = self.size.value / options.num_tccs 221 if ((self.size.value / long(self.assoc)) < 128): 222 self.size.value = long(128 * self.assoc) 223 self.start_index_bit = math.log(options.cacheline_size, 2) + \ 224 math.log(options.num_tccs, 2) 225 self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc) 226 227class TCCCntrl(TCC_Controller, CntrlBase): 228 def create(self, options, ruby_system, system): 229 self.version = self.versionCount() 230 self.L2cache = TCC() 231 self.L2cache.create(options) 232 self.ruby_system = ruby_system 233 if options.recycle_latency: 234 self.recycle_latency = options.recycle_latency 235 236class L3Cache(RubyCache): 237 dataArrayBanks = 16 238 tagArrayBanks = 16 239 240 def create(self, options, ruby_system, system): 241 self.size = MemorySize(options.l3_size) 242 self.size.value /= options.num_dirs 243 self.assoc = options.l3_assoc 244 self.dataArrayBanks /= options.num_dirs 245 self.tagArrayBanks /= options.num_dirs 246 self.dataArrayBanks /= options.num_dirs 247 self.tagArrayBanks /= options.num_dirs 248 self.dataAccessLatency = options.l3_data_latency 249 self.tagAccessLatency = options.l3_tag_latency 250 self.resourceStalls = False 251 self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc) 252 253class L3Cntrl(L3Cache_Controller, CntrlBase): 254 def create(self, options, ruby_system, system): 255 self.version = self.versionCount() 256 self.L3cache = L3Cache() 257 self.L3cache.create(options, ruby_system, system) 258 self.l3_response_latency = \ 259 max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency) 260 self.ruby_system = ruby_system 261 if options.recycle_latency: 262 self.recycle_latency = options.recycle_latency 263 264 def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir, 265 req_to_l3, probe_to_l3, resp_to_l3): 266 self.reqToDir = req_to_dir 267 self.respToDir = resp_to_dir 268 self.l3UnblockToDir = l3_unblock_to_dir 269 self.reqToL3 = req_to_l3 270 self.probeToL3 = probe_to_l3 271 self.respToL3 = resp_to_l3 272 273# Directory memory: Directory memory of infinite size which is 274# used by directory controller to store the "states" of the 275# state machine. The state machine is implemented per cache block 276class DirMem(RubyDirectoryMemory, CntrlBase): 277 def create(self, options, ruby_system, system): 278 self.version = self.versionCount() 279 phys_mem_size = AddrRange(options.mem_size).size() 280 mem_module_size = phys_mem_size / options.num_dirs 281 dir_size = MemorySize('0B') 282 dir_size.value = mem_module_size 283 self.size = dir_size 284 285# Directory controller: Contains directory memory, L3 cache and associated state 286# machine which is used to accurately redirect a data request to L3 cache or to 287# memory. The permissions requests do not come to this directory for region 288# based protocols as they are handled exclusively by the region directory. 289# However, region directory controller uses this directory controller for 290# sending probe requests and receiving probe responses. 291class DirCntrl(Directory_Controller, CntrlBase): 292 def create(self, options, ruby_system, system): 293 self.version = self.versionCount() 294 self.response_latency = 25 295 self.response_latency_regionDir = 1 296 self.directory = DirMem() 297 self.directory.create(options, ruby_system, system) 298 self.L3CacheMemory = L3Cache() 299 self.L3CacheMemory.create(options, ruby_system, system) 300 self.l3_hit_latency = \ 301 max(self.L3CacheMemory.dataAccessLatency, 302 self.L3CacheMemory.tagAccessLatency) 303 304 self.ruby_system = ruby_system 305 if options.recycle_latency: 306 self.recycle_latency = options.recycle_latency 307 308 def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir, 309 req_to_l3, probe_to_l3, resp_to_l3): 310 self.reqToDir = req_to_dir 311 self.respToDir = resp_to_dir 312 self.l3UnblockToDir = l3_unblock_to_dir 313 self.reqToL3 = req_to_l3 314 self.probeToL3 = probe_to_l3 315 self.respToL3 = resp_to_l3 316 317# Region directory : Stores region permissions 318class RegionDir(RubyCache): 319 320 def create(self, options, ruby_system, system): 321 self.block_size = "%dB" % (64 * options.blocks_per_region) 322 self.size = options.region_dir_entries * \ 323 self.block_size * options.num_compute_units 324 self.assoc = 8 325 self.tagArrayBanks = 8 326 self.tagAccessLatency = options.dir_tag_latency 327 self.dataAccessLatency = 1 328 self.resourceStalls = options.no_resource_stalls 329 self.start_index_bit = 6 + int(math.log(options.blocks_per_region, 2)) 330 self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc) 331# Region directory controller : Contains region directory and associated state 332# machine for dealing with region coherence requests. 333class RegionCntrl(RegionDir_Controller, CntrlBase): 334 def create(self, options, ruby_system, system): 335 self.version = self.versionCount() 336 self.cacheMemory = RegionDir() 337 self.cacheMemory.create(options, ruby_system, system) 338 self.blocksPerRegion = options.blocks_per_region 339 self.toDirLatency = \ 340 max(self.cacheMemory.dataAccessLatency, 341 self.cacheMemory.tagAccessLatency) 342 self.ruby_system = ruby_system 343 self.always_migrate = options.always_migrate 344 self.sym_migrate = options.symmetric_migrate 345 self.asym_migrate = options.asymmetric_migrate 346 if self.always_migrate: 347 assert(not self.asym_migrate and not self.sym_migrate) 348 if self.sym_migrate: 349 assert(not self.always_migrate and not self.asym_migrate) 350 if self.asym_migrate: 351 assert(not self.always_migrate and not self.sym_migrate) 352 if options.recycle_latency: 353 self.recycle_latency = options.recycle_latency 354 355# Region Buffer: A region directory cache which avoids some potential 356# long latency lookup of region directory for getting region permissions 357class RegionBuffer(RubyCache): 358 assoc = 4 359 dataArrayBanks = 256 360 tagArrayBanks = 256 361 dataAccessLatency = 1 362 tagAccessLatency = 1 363 resourceStalls = True 364 365class RBCntrl(RegionBuffer_Controller, CntrlBase): 366 def create(self, options, ruby_system, system): 367 self.version = self.versionCount() 368 self.cacheMemory = RegionBuffer() 369 self.cacheMemory.resourceStalls = options.no_tcc_resource_stalls 370 self.cacheMemory.dataArrayBanks = 64 371 self.cacheMemory.tagArrayBanks = 64 372 self.blocksPerRegion = options.blocks_per_region 373 self.cacheMemory.block_size = "%dB" % (64 * self.blocksPerRegion) 374 self.cacheMemory.start_index_bit = \ 375 6 + int(math.log(self.blocksPerRegion, 2)) 376 self.cacheMemory.size = options.region_buffer_entries * \ 377 self.cacheMemory.block_size * options.num_compute_units 378 self.toDirLatency = options.gpu_to_dir_latency 379 self.toRegionDirLatency = options.cpu_to_dir_latency 380 self.noTCCdir = True 381 TCC_bits = int(math.log(options.num_tccs, 2)) 382 self.TCC_select_num_bits = TCC_bits 383 self.ruby_system = ruby_system 384 385 if options.recycle_latency: 386 self.recycle_latency = options.recycle_latency 387 self.cacheMemory.replacement_policy = \ 388 PseudoLRUReplacementPolicy(assoc = self.cacheMemory.assoc) 389 390def define_options(parser): 391 parser.add_option("--num-subcaches", type="int", default=4) 392 parser.add_option("--l3-data-latency", type="int", default=20) 393 parser.add_option("--l3-tag-latency", type="int", default=15) 394 parser.add_option("--cpu-to-dir-latency", type="int", default=120) 395 parser.add_option("--gpu-to-dir-latency", type="int", default=60) 396 parser.add_option("--no-resource-stalls", action="store_false", 397 default=True) 398 parser.add_option("--no-tcc-resource-stalls", action="store_false", 399 default=True) 400 parser.add_option("--num-tbes", type="int", default=32) 401 parser.add_option("--l2-latency", type="int", default=50) # load to use 402 parser.add_option("--num-tccs", type="int", default=1, 403 help="number of TCC banks in the GPU") 404 405 parser.add_option("--sqc-size", type='string', default='32kB', 406 help="SQC cache size") 407 parser.add_option("--sqc-assoc", type='int', default=8, 408 help="SQC cache assoc") 409 410 parser.add_option("--WB_L1", action="store_true", 411 default=False, help="L2 Writeback Cache") 412 parser.add_option("--WB_L2", action="store_true", 413 default=False, help="L2 Writeback Cache") 414 parser.add_option("--TCP_latency", 415 type="int", default=4, help="TCP latency") 416 parser.add_option("--TCC_latency", 417 type="int", default=16, help="TCC latency") 418 parser.add_option("--tcc-size", type='string', default='2MB', 419 help="agregate tcc size") 420 parser.add_option("--tcc-assoc", type='int', default=16, 421 help="tcc assoc") 422 parser.add_option("--tcp-size", type='string', default='16kB', 423 help="tcp size") 424 425 parser.add_option("--dir-tag-latency", type="int", default=4) 426 parser.add_option("--dir-tag-banks", type="int", default=4) 427 parser.add_option("--blocks-per-region", type="int", default=16) 428 parser.add_option("--dir-entries", type="int", default=8192) 429 430 # Region buffer is a cache of region directory. Hence region 431 # directory is inclusive with respect to region directory. 432 # However, region directory is non-inclusive with respect to 433 # the caches in the system 434 parser.add_option("--region-dir-entries", type="int", default=1024) 435 parser.add_option("--region-buffer-entries", type="int", default=512) 436 437 parser.add_option("--always-migrate", 438 action="store_true", default=False) 439 parser.add_option("--symmetric-migrate", 440 action="store_true", default=False) 441 parser.add_option("--asymmetric-migrate", 442 action="store_true", default=False) 443 parser.add_option("--use-L3-on-WT", action="store_true", default=False) 444
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