GPU_RfO.py (13400:cf74d21e948f) | GPU_RfO.py (13731:67cd980cb20f) |
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1# Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# For use for simulation and test purposes only 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are met: 8# --- 456 unchanged lines hidden (view full) --- 465 else: 466 # if the numa_bit is not specified, set the directory bits as the 467 # lowest bits above the block offset bits, and the numa_bit as the 468 # highest of those directory bits 469 dir_bits = int(math.log(options.num_dirs, 2)) 470 block_size_bits = int(math.log(options.cacheline_size, 2)) 471 numa_bit = block_size_bits + dir_bits - 1 472 | 1# Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 2# All rights reserved. 3# 4# For use for simulation and test purposes only 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are met: 8# --- 456 unchanged lines hidden (view full) --- 465 else: 466 # if the numa_bit is not specified, set the directory bits as the 467 # lowest bits above the block offset bits, and the numa_bit as the 468 # highest of those directory bits 469 dir_bits = int(math.log(options.num_dirs, 2)) 470 block_size_bits = int(math.log(options.cacheline_size, 2)) 471 numa_bit = block_size_bits + dir_bits - 1 472 |
473 for i in xrange(options.num_dirs): | 473 for i in range(options.num_dirs): |
474 dir_ranges = [] 475 for r in system.mem_ranges: 476 addr_range = m5.objects.AddrRange(r.start, size = r.size(), 477 intlvHighBit = numa_bit, 478 intlvBits = dir_bits, 479 intlvMatch = i) 480 dir_ranges.append(addr_range) 481 --- 24 unchanged lines hidden (view full) --- 506 507 exec("system.dir_cntrl%d = dir_cntrl" % i) 508 dir_cntrl_nodes.append(dir_cntrl) 509 510 mainCluster.add(dir_cntrl) 511 512 # For an odd number of CPUs, still create the right number of controllers 513 cpuCluster = Cluster(extBW = 512, intBW = 512) # 1 TB/s | 474 dir_ranges = [] 475 for r in system.mem_ranges: 476 addr_range = m5.objects.AddrRange(r.start, size = r.size(), 477 intlvHighBit = numa_bit, 478 intlvBits = dir_bits, 479 intlvMatch = i) 480 dir_ranges.append(addr_range) 481 --- 24 unchanged lines hidden (view full) --- 506 507 exec("system.dir_cntrl%d = dir_cntrl" % i) 508 dir_cntrl_nodes.append(dir_cntrl) 509 510 mainCluster.add(dir_cntrl) 511 512 # For an odd number of CPUs, still create the right number of controllers 513 cpuCluster = Cluster(extBW = 512, intBW = 512) # 1 TB/s |
514 for i in xrange((options.num_cpus + 1) / 2): | 514 for i in range((options.num_cpus + 1) // 2): |
515 516 cp_cntrl = CPCntrl() 517 cp_cntrl.create(options, ruby_system, system) 518 519 exec("system.cp_cntrl%d = cp_cntrl" % i) 520 # 521 # Add controllers and sequencers to the appropriate lists 522 # --- 17 unchanged lines hidden (view full) --- 540 541 cp_cntrl.mandatoryQueue = MessageBuffer() 542 cp_cntrl.triggerQueue = MessageBuffer(ordered = True) 543 544 cpuCluster.add(cp_cntrl) 545 546 gpuCluster = Cluster(extBW = 512, intBW = 512) # 1 TB/s 547 | 515 516 cp_cntrl = CPCntrl() 517 cp_cntrl.create(options, ruby_system, system) 518 519 exec("system.cp_cntrl%d = cp_cntrl" % i) 520 # 521 # Add controllers and sequencers to the appropriate lists 522 # --- 17 unchanged lines hidden (view full) --- 540 541 cp_cntrl.mandatoryQueue = MessageBuffer() 542 cp_cntrl.triggerQueue = MessageBuffer(ordered = True) 543 544 cpuCluster.add(cp_cntrl) 545 546 gpuCluster = Cluster(extBW = 512, intBW = 512) # 1 TB/s 547 |
548 for i in xrange(options.num_compute_units): | 548 for i in range(options.num_compute_units): |
549 550 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 551 number_of_TBEs = 2560) # max outstanding requests 552 tcp_cntrl.create(options, ruby_system, system) 553 554 exec("system.tcp_cntrl%d = tcp_cntrl" % i) 555 # 556 # Add controllers and sequencers to the appropriate lists --- 16 unchanged lines hidden (view full) --- 573 574 tcp_cntrl.responseToTCP = MessageBuffer(ordered = True) 575 tcp_cntrl.responseToTCP.slave = ruby_system.network.master 576 577 tcp_cntrl.mandatoryQueue = MessageBuffer() 578 579 gpuCluster.add(tcp_cntrl) 580 | 549 550 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 551 number_of_TBEs = 2560) # max outstanding requests 552 tcp_cntrl.create(options, ruby_system, system) 553 554 exec("system.tcp_cntrl%d = tcp_cntrl" % i) 555 # 556 # Add controllers and sequencers to the appropriate lists --- 16 unchanged lines hidden (view full) --- 573 574 tcp_cntrl.responseToTCP = MessageBuffer(ordered = True) 575 tcp_cntrl.responseToTCP.slave = ruby_system.network.master 576 577 tcp_cntrl.mandatoryQueue = MessageBuffer() 578 579 gpuCluster.add(tcp_cntrl) 580 |
581 for i in xrange(options.num_sqc): | 581 for i in range(options.num_sqc): |
582 583 sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits) 584 sqc_cntrl.create(options, ruby_system, system) 585 586 exec("system.sqc_cntrl%d = sqc_cntrl" % i) 587 # 588 # Add controllers and sequencers to the appropriate lists 589 # --- 15 unchanged lines hidden (view full) --- 605 sqc_cntrl.responseToSQC = MessageBuffer(ordered = True) 606 sqc_cntrl.responseToSQC.slave = ruby_system.network.master 607 608 sqc_cntrl.mandatoryQueue = MessageBuffer() 609 610 # SQC also in GPU cluster 611 gpuCluster.add(sqc_cntrl) 612 | 582 583 sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits) 584 sqc_cntrl.create(options, ruby_system, system) 585 586 exec("system.sqc_cntrl%d = sqc_cntrl" % i) 587 # 588 # Add controllers and sequencers to the appropriate lists 589 # --- 15 unchanged lines hidden (view full) --- 605 sqc_cntrl.responseToSQC = MessageBuffer(ordered = True) 606 sqc_cntrl.responseToSQC.slave = ruby_system.network.master 607 608 sqc_cntrl.mandatoryQueue = MessageBuffer() 609 610 # SQC also in GPU cluster 611 gpuCluster.add(sqc_cntrl) 612 |
613 for i in xrange(options.num_cp): | 613 for i in range(options.num_cp): |
614 615 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 616 number_of_TBEs = 2560) # max outstanding requests 617 tcp_cntrl.createCP(options, ruby_system, system) 618 619 exec("system.tcp_cntrl%d = tcp_cntrl" % (options.num_compute_units + i)) 620 # 621 # Add controllers and sequencers to the appropriate lists --- 46 unchanged lines hidden (view full) --- 668 sqc_cntrl.responseToSQC = MessageBuffer(ordered = True) 669 sqc_cntrl.responseToSQC.slave = ruby_system.network.master 670 671 sqc_cntrl.mandatoryQueue = MessageBuffer() 672 673 # SQC also in GPU cluster 674 gpuCluster.add(sqc_cntrl) 675 | 614 615 tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits, 616 number_of_TBEs = 2560) # max outstanding requests 617 tcp_cntrl.createCP(options, ruby_system, system) 618 619 exec("system.tcp_cntrl%d = tcp_cntrl" % (options.num_compute_units + i)) 620 # 621 # Add controllers and sequencers to the appropriate lists --- 46 unchanged lines hidden (view full) --- 668 sqc_cntrl.responseToSQC = MessageBuffer(ordered = True) 669 sqc_cntrl.responseToSQC.slave = ruby_system.network.master 670 671 sqc_cntrl.mandatoryQueue = MessageBuffer() 672 673 # SQC also in GPU cluster 674 gpuCluster.add(sqc_cntrl) 675 |
676 for i in xrange(options.num_tccs): | 676 for i in range(options.num_tccs): |
677 678 tcc_cntrl = TCCCntrl(TCC_select_num_bits = TCC_bits, 679 number_of_TBEs = options.num_compute_units * 2560) 680 #Enough TBEs for all TCP TBEs 681 tcc_cntrl.create(options, ruby_system, system) 682 tcc_cntrl_nodes.append(tcc_cntrl) 683 684 tccdir_cntrl = TCCDirCntrl(TCC_select_num_bits = TCC_bits, --- 77 unchanged lines hidden --- | 677 678 tcc_cntrl = TCCCntrl(TCC_select_num_bits = TCC_bits, 679 number_of_TBEs = options.num_compute_units * 2560) 680 #Enough TBEs for all TCP TBEs 681 tcc_cntrl.create(options, ruby_system, system) 682 tcc_cntrl_nodes.append(tcc_cntrl) 683 684 tccdir_cntrl = TCCDirCntrl(TCC_select_num_bits = TCC_bits, --- 77 unchanged lines hidden --- |