| se.py (9384:877293183bdf) | se.py (9577:91cac7c9c636) |
|---|---|
| 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 173 unchanged lines hidden (view full) --- 182 183 system.cpu[i].createThreads() 184 185if options.ruby: 186 if not (options.cpu_type == "detailed" or options.cpu_type == "timing"): 187 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" 188 sys.exit(1) 189 | 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 173 unchanged lines hidden (view full) --- 182 183 system.cpu[i].createThreads() 184 185if options.ruby: 186 if not (options.cpu_type == "detailed" or options.cpu_type == "timing"): 187 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" 188 sys.exit(1) 189 |
| 190 # Set the option for physmem so that it is not allocated any space 191 system.physmem.null = True 192 |
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| 190 options.use_map = True 191 Ruby.create_system(options, system) 192 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) 193 194 for i in xrange(np): 195 ruby_port = system.ruby._cpu_ruby_ports[i] 196 197 # Create the interrupt controller and connect its ports to Ruby --- 20 unchanged lines hidden --- | 193 options.use_map = True 194 Ruby.create_system(options, system) 195 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) 196 197 for i in xrange(np): 198 ruby_port = system.ruby._cpu_ruby_ports[i] 199 200 # Create the interrupt controller and connect its ports to Ruby --- 20 unchanged lines hidden --- |