1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2008 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Steve Reinhardt 40 41# Simple test script 42# 43# "m5 test.py" 44 45import os 46import optparse 47import sys 48from os.path import join as joinpath 49 50import m5 51from m5.defines import buildEnv 52from m5.objects import * 53from m5.util import addToPath, fatal 54 55if buildEnv['FULL_SYSTEM']: 56 fatal("This script requires syscall emulation mode (*_SE).") 57 58addToPath('../common') 59addToPath('../ruby') 60 61import Ruby 62 63import Simulation 64import CacheConfig 65from Caches import * 66from cpu2000 import * 67 68# Get paths we might need. It's expected this file is in m5/configs/example. 69config_path = os.path.dirname(os.path.abspath(__file__)) 70config_root = os.path.dirname(config_path) 71m5_root = os.path.dirname(config_root) 72 73parser = optparse.OptionParser() 74 75# Benchmark options 76parser.add_option("-c", "--cmd", 77 default=joinpath(m5_root, "tests/test-progs/hello/bin/%s/linux/hello" % \ 78 buildEnv['TARGET_ISA']), 79 help="The binary to run in syscall emulation mode.") 80parser.add_option("-o", "--options", default="", 81 help='The options to pass to the binary, use " " around the entire string') 82parser.add_option("-i", "--input", default="", help="Read stdin from a file.") 83parser.add_option("--output", default="", help="Redirect stdout to a file.") 84parser.add_option("--errout", default="", help="Redirect stderr to a file.") 85 86execfile(os.path.join(config_root, "common", "Options.py")) 87 88if buildEnv['PROTOCOL'] != 'None': 89 parser.add_option("--ruby", action="store_true") 90 if '--ruby' in sys.argv: 91 Ruby.define_options(parser) 92 93(options, args) = parser.parse_args() 94 95if args: 96 print "Error: script doesn't take any positional arguments" 97 sys.exit(1) 98 99multiprocesses = [] 100apps = [] 101 102if options.bench: 103 apps = options.bench.split("-") 104 if len(apps) != options.num_cpus: 105 print "number of benchmarks not equal to set num_cpus!" 106 sys.exit(1) 107 108 for app in apps: 109 try: 110 if buildEnv['TARGET_ISA'] == 'alpha': 111 exec("workload = %s('alpha', 'tru64', 'ref')" % app) 112 else: 113 exec("workload = %s(buildEnv['TARGET_ISA'], 'linux', 'ref')" % app) 114 multiprocesses.append(workload.makeLiveProcess()) 115 except: 116 print >>sys.stderr, "Unable to find workload for %s: %s" % (buildEnv['TARGET_ISA'], app) 117 sys.exit(1) 118else: 119 process = LiveProcess() 120 process.executable = options.cmd 121 process.cmd = [options.cmd] + options.options.split() 122 multiprocesses.append(process) 123 124 125if options.input != "": 126 process.input = options.input 127if options.output != "": 128 process.output = options.output 129if options.errout != "": 130 process.errout = options.errout 131 132 133# By default, set workload to path of user-specified binary 134workloads = options.cmd 135numThreads = 1 136 137if options.cpu_type == "detailed" or options.cpu_type == "inorder": 138 #check for SMT workload 139 workloads = options.cmd.split(';') 140 if len(workloads) > 1: 141 process = [] 142 smt_idx = 0 143 inputs = [] 144 outputs = [] 145 errouts = [] 146 147 if options.input != "": 148 inputs = options.input.split(';') 149 if options.output != "": 150 outputs = options.output.split(';') 151 if options.errout != "": 152 errouts = options.errout.split(';') 153 154 for wrkld in workloads: 155 smt_process = LiveProcess() 156 smt_process.executable = wrkld 157 smt_process.cmd = wrkld + " " + options.options 158 if inputs and inputs[smt_idx]: 159 smt_process.input = inputs[smt_idx] 160 if outputs and outputs[smt_idx]: 161 smt_process.output = outputs[smt_idx] 162 if errouts and errouts[smt_idx]: 163 smt_process.errout = errouts[smt_idx] 164 process += [smt_process, ] 165 smt_idx += 1 166 numThreads = len(workloads) 167 168if options.ruby: 169 if not (options.cpu_type == "detailed" or options.cpu_type == "timing"): 170 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" 171 sys.exit(1) 172 173(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 174CPUClass.clock = '2GHz' 175CPUClass.numThreads = numThreads; 176 177np = options.num_cpus 178 179system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], 180 physmem = PhysicalMemory(range=AddrRange("512MB")), 181 membus = Bus(), mem_mode = test_mem_mode) 182 183if options.ruby: 184 options.use_map = True 185 Ruby.create_system(options, system) 186 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
|