se.py (3481:14362d3b0756) | se.py (3514:b166ee5dce91) |
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1# Copyright (c) 2006 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 87 unchanged lines hidden (view full) --- 96 97system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], 98 physmem = PhysicalMemory(range=AddrRange("512MB")), 99 membus = Bus(), mem_mode = test_mem_mode) 100 101system.physmem.port = system.membus.port 102 103for i in xrange(np): | 1# Copyright (c) 2006 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 87 unchanged lines hidden (view full) --- 96 97system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], 98 physmem = PhysicalMemory(range=AddrRange("512MB")), 99 membus = Bus(), mem_mode = test_mem_mode) 100 101system.physmem.port = system.membus.port 102 103for i in xrange(np): |
104 if options.caches and not options.standard_switch and not FutureClass: | 104 if options.caches: |
105 system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 106 L1Cache(size = '64kB')) 107 system.cpu[i].connectMemPorts(system.membus) 108 system.cpu[i].workload = process 109 110root = Root(system = system) 111 112Simulation.run(options, root, system, FutureClass) | 105 system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 106 L1Cache(size = '64kB')) 107 system.cpu[i].connectMemPorts(system.membus) 108 system.cpu[i].workload = process 109 110root = Root(system = system) 111 112Simulation.run(options, root, system, FutureClass) |