1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; 9# redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in the 11# documentation and/or other materials provided with the distribution; 12# neither the name of the copyright holders nor the names of its 13# contributors may be used to endorse or promote products derived from 14# this software without specific prior written permission. 15# 16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Ron Dreslinski 29# Brad Beckmann 30 31import m5 32from m5.objects import * 33from m5.defines import buildEnv 34from m5.util import addToPath 35import os, optparse, sys 36addToPath('../common') 37addToPath('../ruby') 38addToPath('../topologies') 39 40import Options 41import Ruby 42 43# Get paths we might need. It's expected this file is in m5/configs/example. 44config_path = os.path.dirname(os.path.abspath(__file__)) 45config_root = os.path.dirname(config_path) 46 47parser = optparse.OptionParser() 48Options.addCommonOptions(parser) 49 50parser.add_option("-l", "--maxloads", metavar="N", default=0, 51 help="Stop after N loads") 52parser.add_option("--progress", type="int", default=1000, 53 metavar="NLOADS", 54 help="Progress message interval " 55 "[default: %default]") 56parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers") 57parser.add_option("--functional", type="int", default=0, 58 help="percentage of accesses that should be functional") 59parser.add_option("--suppress-func-warnings", action="store_true", 60 help="suppress warnings when functional accesses fail") 61 62# 63# Add the ruby specific and protocol specific options 64# 65Ruby.define_options(parser) 66 67execfile(os.path.join(config_root, "common", "Options.py")) 68 69(options, args) = parser.parse_args() 70 71# 72# Set the default cache size and associativity to be very small to encourage 73# races between requests and writebacks. 74# 75options.l1d_size="256B" 76options.l1i_size="256B" 77options.l2_size="512B" 78options.l3_size="1kB" 79options.l1d_assoc=2 80options.l1i_assoc=2 81options.l2_assoc=2 82options.l3_assoc=2 83 84if args: 85 print "Error: script doesn't take any positional arguments" 86 sys.exit(1) 87 88block_size = 64 89 90if options.num_cpus > block_size: 91 print "Error: Number of testers %d limited to %d because of false sharing" \ 92 % (options.num_cpus, block_size) 93 sys.exit(1) 94 95# 96# Currently ruby does not support atomic or uncacheable accesses 97# 98cpus = [ MemTest(atomic = False, 99 max_loads = options.maxloads, 100 issue_dmas = False, 101 percent_functional = options.functional, 102 percent_uncacheable = 0, 103 progress_interval = options.progress, 104 suppress_func_warnings = options.suppress_func_warnings) \ 105 for i in xrange(options.num_cpus) ] 106 107system = System(cpu = cpus, 108 funcmem = SimpleMemory(in_addr_map = False), 109 funcbus = NoncoherentBus(), 110 physmem = SimpleMemory())
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112 113if options.num_dmas > 0: 114 dmas = [ MemTest(atomic = False, 115 max_loads = options.maxloads, 116 issue_dmas = True, 117 percent_functional = 0, 118 percent_uncacheable = 0, 119 progress_interval = options.progress, 120 suppress_func_warnings = 121 not options.suppress_func_warnings) \ 122 for i in xrange(options.num_dmas) ] 123 system.dma_devices = dmas 124else: 125 dmas = [] 126 127dma_ports = [] 128for (i, dma) in enumerate(dmas): 129 dma_ports.append(dma.test) 130Ruby.create_system(options, system, dma_ports = dma_ports) 131 132# 133# The tester is most effective when randomization is turned on and 134# artifical delay is randomly inserted on messages 135# 136system.ruby.randomization = True 137 138assert(len(cpus) == len(system.ruby._cpu_ruby_ports)) 139 140for (i, cpu) in enumerate(cpus): 141 # 142 # Tie the cpu memtester ports to the correct system ports 143 # 144 cpu.test = system.ruby._cpu_ruby_ports[i].slave 145 cpu.functional = system.funcbus.slave 146 147 # 148 # Since the memtester is incredibly bursty, increase the deadlock 149 # threshold to 5 million cycles 150 # 151 system.ruby._cpu_ruby_ports[i].deadlock_threshold = 5000000 152 153 # 154 # Ruby doesn't need the backing image of memory when running with 155 # the tester. 156 # 157 system.ruby._cpu_ruby_ports[i].access_phys_mem = False 158 159for (i, dma) in enumerate(dmas): 160 # 161 # Tie the dma memtester ports to the correct functional port 162 # Note that the test port has already been connected to the dma_sequencer 163 # 164 dma.functional = system.funcbus.slave 165 166# connect reference memory to funcbus 167system.funcbus.master = system.funcmem.port 168 169# ----------------------- 170# run simulation 171# ----------------------- 172 173root = Root( full_system = False, system = system ) 174root.system.mem_mode = 'timing' 175 176# Not much point in this being higher than the L1 latency 177m5.ticks.setGlobalFrequency('1ns') 178 179# instantiate configuration 180m5.instantiate() 181 182# simulate until program terminates 183exit_event = m5.simulate(options.maxtick) 184 185print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
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