1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 112 unchanged lines hidden (view full) --- 121 dma_devices = dmas) 122 123# 124# The tester is most effective when randomization is turned on and 125# artifical delay is randomly inserted on messages 126# 127system.ruby.randomization = True 128 |
129assert(len(cpus) == len(system.ruby._cpu_ruby_ports)) |
130 131for (i, cpu) in enumerate(cpus): 132 # 133 # Tie the cpu memtester ports to the correct system ports 134 # |
135 cpu.test = system.ruby._cpu_ruby_ports[i].port |
136 cpu.functional = system.funcmem.port 137 138 # 139 # Since the memtester is incredibly bursty, increase the deadlock 140 # threshold to 5 million cycles 141 # |
142 system.ruby._cpu_ruby_ports[i].deadlock_threshold = 5000000 |
143 144for (i, dma) in enumerate(dmas): 145 # 146 # Tie the dma memtester ports to the correct functional port 147 # Note that the test port has already been connected to the dma_sequencer 148 # 149 dma.functional = system.funcmem.port 150 --- 17 unchanged lines hidden --- |