1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 78 unchanged lines hidden (view full) --- 87 print "Error: unknown direct test generator" 88 sys.exit(1) 89 90# 91# Create the M5 system. Note that the Memory Object isn't 92# actually used by the rubytester, but is included to support the 93# M5 memory size == Ruby memory size checks 94# |
95system = System(physmem = SimpleMemory()) |
96 |
97 98# Create a top-level voltage domain and clock domain 99system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 100 101system.clk_domain = SrcClockDomain(clock = options.sys_clock, 102 voltage_domain = system.voltage_domain) 103 |
104# 105# Create the ruby random tester 106# 107system.tester = RubyDirectedTester(requests_to_complete = \ 108 options.requests, 109 generator = generator) 110 111Ruby.create_system(options, system) 112 113# Since Ruby runs at an independent frequency, create a seperate clock |
114system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 115 voltage_domain = system.voltage_domain) |
116 117assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) 118 119for ruby_port in system.ruby._cpu_ruby_ports: 120 # 121 # Tie the ruby tester ports to the ruby cpu ports 122 # 123 system.tester.cpuPort = ruby_port.slave --- 18 unchanged lines hidden --- |