ruby_direct_test.py (9909:0679c3554ba3) | ruby_direct_test.py (10120:f5ceb3c3edb6) |
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1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 101 unchanged lines hidden (view full) --- 110 generator = generator) 111 112Ruby.create_system(options, system) 113 114# Since Ruby runs at an independent frequency, create a seperate clock 115system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 116 voltage_domain = system.voltage_domain) 117 | 1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; --- 101 unchanged lines hidden (view full) --- 110 generator = generator) 111 112Ruby.create_system(options, system) 113 114# Since Ruby runs at an independent frequency, create a seperate clock 115system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 116 voltage_domain = system.voltage_domain) 117 |
118assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) | 118assert(options.num_cpus == len(system.ruby._cpu_ports)) |
119 | 119 |
120for ruby_port in system.ruby._cpu_ruby_ports: | 120for ruby_port in system.ruby._cpu_ports: |
121 # 122 # Tie the ruby tester ports to the ruby cpu ports 123 # 124 system.tester.cpuPort = ruby_port.slave 125 126# ----------------------- 127# run simulation 128# ----------------------- --- 14 unchanged lines hidden --- | 121 # 122 # Tie the ruby tester ports to the ruby cpu ports 123 # 124 system.tester.cpuPort = ruby_port.slave 125 126# ----------------------- 127# run simulation 128# ----------------------- --- 14 unchanged lines hidden --- |