1# Copyright (c) 2015-2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ron Dreslinski
40# Andreas Hansson
41
42from __future__ import print_function
43
44import optparse
45import random
46import sys
47
48import m5
49from m5.objects import *
50
51parser = optparse.OptionParser()

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105parser.add_option("--sys-clock", action="store", type="string",
106 default='1GHz',
107 help = """Top-level clock for blocks running at system
108 speed""")
109
110(options, args) = parser.parse_args()
111
112if args:
111 print "Error: script doesn't take any positional arguments"
113 print("Error: script doesn't take any positional arguments")
114 sys.exit(1)
115
116# Start by parsing the command line options and do some basic sanity
117# checking
118if options.random:
119 # Generate a tree with a valid number of testers
120 tree_depth = random.randint(1, 4)
121 cachespec = [random.randint(1, 3) for i in range(tree_depth)]
122 testerspec = [random.randint(1, 3) for i in range(tree_depth + 1)]
121 print "Generated random tree -c", ':'.join(map(str, cachespec)), \
122 "-t", ':'.join(map(str, testerspec))
123 print("Generated random tree -c", ':'.join(map(str, cachespec)),
124 "-t", ':'.join(map(str, testerspec)))
125else:
126 try:
127 cachespec = [int(x) for x in options.caches.split(':')]
128 testerspec = [int(x) for x in options.testers.split(':')]
129 except:
128 print "Error: Unable to parse caches or testers option"
130 print("Error: Unable to parse caches or testers option")
131 sys.exit(1)
132
133 if len(cachespec) < 1:
132 print "Error: Must have at least one level of caches"
134 print("Error: Must have at least one level of caches")
135 sys.exit(1)
136
137 if len(cachespec) != len(testerspec) - 1:
136 print "Error: Testers must have one element more than caches"
138 print("Error: Testers must have one element more than caches")
139 sys.exit(1)
140
141 if testerspec[-1] == 0:
140 print "Error: Must have testers at the uppermost level"
142 print("Error: Must have testers at the uppermost level")
143 sys.exit(1)
144
145 for t in testerspec:
146 if t < 0:
145 print "Error: Cannot have a negative number of testers"
147 print("Error: Cannot have a negative number of testers")
148 sys.exit(1)
149
150 for c in cachespec:
151 if c < 1:
150 print "Error: Must have 1 or more caches at each level"
152 print("Error: Must have 1 or more caches at each level")
153 sys.exit(1)
154
155# Determine the tester multiplier for each level as the string
156# elements are per subsystem and it fans out
157multiplier = [1]
158for c in cachespec:
159 if c < 1:
158 print "Error: Must have at least one cache per level"
160 print("Error: Must have at least one cache per level")
161 multiplier.append(multiplier[-1] * c)
162
163numtesters = 0
164for t, m in zip(testerspec, multiplier):
165 numtesters += t * m
166
167# Define a prototype L1 cache that we scale for all successive levels
168proto_l1 = Cache(size = '32kB', assoc = 4,

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272 cache.mem_side = xbar.slave
273 make_cache_level(ncaches[1:], prototypes[1:], level - 1, cache)
274 for tester, checker, cache in zip(testers, checkers, tester_caches):
275 tester.port = checker.slave
276 checker.master = cache.cpu_side
277 cache.mem_side = xbar.slave
278 else:
279 if not next_cache:
278 print "Error: No next-level cache at top level"
280 print("Error: No next-level cache at top level")
281 sys.exit(1)
282
283 if ntesters > 1:
284 # Create a crossbar and add it to the subsystem
285 xbar = L2XBar(width = 32)
286 subsys.xbar = xbar
287 xbar.master = next_cache.cpu_side
288 for tester, checker in zip(testers, checkers):

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312root.system.system_port = last_subsys.xbar.slave
313
314# Instantiate configuration
315m5.instantiate()
316
317# Simulate until program terminates
318exit_event = m5.simulate(options.maxtick)
319
318print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
320print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause())