fs_power.py (12564:2778478ca882) fs_power.py (13022:6c0f747b0c64)
1# Copyright (c) 2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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64class CpuPowerModel(PowerModel):
65 pm = [
66 CpuPowerOn(), # ON
67 CpuPowerOff(), # CLK_GATED
68 CpuPowerOff(), # SRAM_RETENTION
69 CpuPowerOff(), # OFF
70 ]
71
1# Copyright (c) 2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 55 unchanged lines hidden (view full) ---

64class CpuPowerModel(PowerModel):
65 pm = [
66 CpuPowerOn(), # ON
67 CpuPowerOff(), # CLK_GATED
68 CpuPowerOff(), # SRAM_RETENTION
69 CpuPowerOff(), # OFF
70 ]
71
72class L2PowerOn(MathExprPowerModel):
73 # Example to report l2 Cache overall_accesses
74 # The estimated power is converted to Watt and will vary based on the size of the cache
75 dyn = "overall_accesses*0.000018000"
76 st = "(voltage * 3)/10"
72
77
78class L2PowerOff(MathExprPowerModel):
79 dyn = "0"
80 st = "0"
81
82class L2PowerModel(PowerModel):
83 # Choose a power model for every power state
84 pm = [
85 L2PowerOn(), # ON
86 L2PowerOff(), # CLK_GATED
87 L2PowerOff(), # SRAM_RETENTION
88 L2PowerOff(), # OFF
89 ]
90
91
73def main():
74 parser = argparse.ArgumentParser(
75 description="Generic ARM big.LITTLE configuration with "\
76 "example power models")
77 bL.addOptions(parser)
78 options = parser.parse_args()
79
80 if options.cpu_type != "timing":

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85 # Wire up some example power models to the CPUs
86 for cpu in root.system.descendants():
87 if not isinstance(cpu, m5.objects.BaseCPU):
88 continue
89
90 cpu.default_p_state = "ON"
91 cpu.power_model = CpuPowerModel()
92
92def main():
93 parser = argparse.ArgumentParser(
94 description="Generic ARM big.LITTLE configuration with "\
95 "example power models")
96 bL.addOptions(parser)
97 options = parser.parse_args()
98
99 if options.cpu_type != "timing":

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104 # Wire up some example power models to the CPUs
105 for cpu in root.system.descendants():
106 if not isinstance(cpu, m5.objects.BaseCPU):
107 continue
108
109 cpu.default_p_state = "ON"
110 cpu.power_model = CpuPowerModel()
111
112 # Example power model for the L2 Cache of the bigCluster
113 for l2 in root.system.bigCluster.l2.descendants():
114 if not isinstance(l2, m5.objects.Cache):
115 continue
116
117 l2.default_p_state = "ON"
118 l2.power_model = L2PowerModel()
119
93 bL.instantiate(options)
94
95 print("*" * 70)
96 print("WARNING: The power numbers generated by this script are "
97 "examples. They are not representative of any particular "
98 "implementation or process.")
99 print("*" * 70)
100
101 # Dumping stats periodically
102 m5.stats.periodicStatDump(m5.ticks.fromSeconds(0.1E-3))
103 bL.run()
104
105
106if __name__ == "__m5_main__":
107 main()
120 bL.instantiate(options)
121
122 print("*" * 70)
123 print("WARNING: The power numbers generated by this script are "
124 "examples. They are not representative of any particular "
125 "implementation or process.")
126 print("*" * 70)
127
128 # Dumping stats periodically
129 m5.stats.periodicStatDump(m5.ticks.fromSeconds(0.1E-3))
130 bL.run()
131
132
133if __name__ == "__m5_main__":
134 main()