1#
2# Copyright (c) 2015 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# For use for simulation and test purposes only
6#
7# Redistribution and use in source and binary forms, with or without
8# modification, are permitted provided that the following conditions are met:

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28# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31# POSSIBILITY OF SUCH DAMAGE.
32#
33# Author: Sooraj Puthoor
34#
35
36import optparse, os, re
37import math
38import glob
39import inspect
40
41import m5
42from m5.objects import *
43from m5.util import addToPath

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380 kernel_files = [find_file(benchmark_path, f)
381 for f in options.kernel_files.split(':')]
382else:
383 # if kernel_files is not set, see if there's a unique .asm file
384 # in the same directory as the executable
385 kernel_path = os.path.dirname(executable)
386 kernel_files = glob.glob(os.path.join(kernel_path, '*.asm'))
387 if kernel_files:
388 print "Using GPU kernel code file(s)", ",".join(kernel_files)
389 else:
390 fatal("Can't locate kernel code (.asm) in " + kernel_path)
391
392# OpenCL driver
393driver = ClDriver(filename="hsa", codefile=kernel_files)
394for cpu in cpu_list:
395 cpu.createThreads()
396 cpu.workload = Process(executable = executable,

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484 # in one GPU issue cycle. Hence wavefront_size mem ports.
485 for j in xrange(wavefront_size):
486 system.cpu[shader_idx].CUs[i].memory_port[j] = \
487 system.ruby._cpu_ports[gpu_port_idx].slave[j]
488 gpu_port_idx += 1
489
490for i in xrange(n_cu):
491 if i > 0 and not i % options.cu_per_sqc:
492 print "incrementing idx on ", i
493 gpu_port_idx += 1
494 system.cpu[shader_idx].CUs[i].sqc_port = \
495 system.ruby._cpu_ports[gpu_port_idx].slave
496gpu_port_idx = gpu_port_idx + 1
497
498# attach CP ports to Ruby
499for i in xrange(options.num_cp):
500 system.cpu[cp_idx].createInterruptController()

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547
548checkpoint_dir = None
549m5.instantiate(checkpoint_dir)
550
551# Map workload to this address space
552host_cpu.workload[0].map(0x10000000, 0x200000000, 4096)
553
554if options.fast_forward:
555 print "Switch at instruction count: %d" % \
556 cpu_list[0].max_insts_any_thread
557
558exit_event = m5.simulate(maxtick)
559
560if options.fast_forward:
561 if exit_event.getCause() == "a thread reached the max instruction count":
562 m5.switchCpus(system, switch_cpu_list)
563 print "Switched CPUS @ tick %s" % (m5.curTick())
564 m5.stats.reset()
565 exit_event = m5.simulate(maxtick - m5.curTick())
566elif options.fast_forward_pseudo_op:
567 while exit_event.getCause() == "switchcpu":
568 # If we are switching *to* kvm, then the current stats are meaningful
569 # Note that we don't do any warmup by default
570 if type(switch_cpu_list[0][0]) == FutureCpuClass:
571 print "Dumping stats..."
572 m5.stats.dump()
573 m5.switchCpus(system, switch_cpu_list)
574 print "Switched CPUS @ tick %s" % (m5.curTick())
575 m5.stats.reset()
576 # This lets us switch back and forth without keeping a counter
577 switch_cpu_list = [(x[1], x[0]) for x in switch_cpu_list]
578 exit_event = m5.simulate(maxtick - m5.curTick())
579
580print "Ticks:", m5.curTick()
581print 'Exiting because ', exit_event.getCause()
582sys.exit(exit_event.getCode())