Simulation.py (5822:05ffa2c3c800) Simulation.py (5869:acbe11bbfe68)
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 29 unchanged lines hidden (view full) ---

38 atomic = False
39 if options.timing:
40 class TmpClass(TimingSimpleCPU): pass
41 elif options.detailed:
42 if not options.caches:
43 print "O3 CPU must be used with caches"
44 sys.exit(1)
45 class TmpClass(DerivO3CPU): pass
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 29 unchanged lines hidden (view full) ---

38 atomic = False
39 if options.timing:
40 class TmpClass(TimingSimpleCPU): pass
41 elif options.detailed:
42 if not options.caches:
43 print "O3 CPU must be used with caches"
44 sys.exit(1)
45 class TmpClass(DerivO3CPU): pass
46 elif options.inorder:
47 if not options.caches:
48 print "InOrder CPU must be used with caches"
49 sys.exit(1)
50 class TmpClass(InOrderCPU): pass
46 else:
47 class TmpClass(AtomicSimpleCPU): pass
48 atomic = True
49
50 CPUClass = None
51 test_mem_mode = 'atomic'
52
53 if not atomic:

--- 309 unchanged lines hidden --- 		51 else:
52 class TmpClass(AtomicSimpleCPU): pass
53 atomic = True
54
55 CPUClass = None
56 test_mem_mode = 'atomic'
57
58 if not atomic:

--- 309 unchanged lines hidden ---