| Simulation.py (13432:6ce67b7e6e44) | Simulation.py (13731:67cd980cb20f) |
|---|---|
| 1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 439 unchanged lines hidden (view full) --- 448 449 if options.repeat_switch and options.take_checkpoints: 450 fatal("Can't specify both --repeat-switch and --take-checkpoints") 451 452 np = options.num_cpus 453 switch_cpus = None 454 455 if options.prog_interval: | 1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 439 unchanged lines hidden (view full) --- 448 449 if options.repeat_switch and options.take_checkpoints: 450 fatal("Can't specify both --repeat-switch and --take-checkpoints") 451 452 np = options.num_cpus 453 switch_cpus = None 454 455 if options.prog_interval: |
| 456 for i in xrange(np): | 456 for i in range(np): |
| 457 testsys.cpu[i].progress_interval = options.prog_interval 458 459 if options.maxinsts: | 457 testsys.cpu[i].progress_interval = options.prog_interval 458 459 if options.maxinsts: |
| 460 for i in xrange(np): | 460 for i in range(np): |
| 461 testsys.cpu[i].max_insts_any_thread = options.maxinsts 462 463 if cpu_class: 464 switch_cpus = [cpu_class(switched_out=True, cpu_id=(i)) | 461 testsys.cpu[i].max_insts_any_thread = options.maxinsts 462 463 if cpu_class: 464 switch_cpus = [cpu_class(switched_out=True, cpu_id=(i)) |
| 465 for i in xrange(np)] | 465 for i in range(np)] |
| 466 | 466 |
| 467 for i in xrange(np): | 467 for i in range(np): |
| 468 if options.fast_forward: 469 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 470 switch_cpus[i].system = testsys 471 switch_cpus[i].workload = testsys.cpu[i].workload 472 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 473 switch_cpus[i].progress_interval = \ 474 testsys.cpu[i].progress_interval 475 switch_cpus[i].isa = testsys.cpu[i].isa --- 8 unchanged lines hidden (view full) --- 484 switch_cpus[i].branchPred = bpClass() 485 486 # If elastic tracing is enabled attach the elastic trace probe 487 # to the switch CPUs 488 if options.elastic_trace_en: 489 CpuConfig.config_etrace(cpu_class, switch_cpus, options) 490 491 testsys.switch_cpus = switch_cpus | 468 if options.fast_forward: 469 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 470 switch_cpus[i].system = testsys 471 switch_cpus[i].workload = testsys.cpu[i].workload 472 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 473 switch_cpus[i].progress_interval = \ 474 testsys.cpu[i].progress_interval 475 switch_cpus[i].isa = testsys.cpu[i].isa --- 8 unchanged lines hidden (view full) --- 484 switch_cpus[i].branchPred = bpClass() 485 486 # If elastic tracing is enabled attach the elastic trace probe 487 # to the switch CPUs 488 if options.elastic_trace_en: 489 CpuConfig.config_etrace(cpu_class, switch_cpus, options) 490 491 testsys.switch_cpus = switch_cpus |
| 492 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] | 492 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in range(np)] |
| 493 494 if options.repeat_switch: 495 switch_class = getCPUClass(options.cpu_type)[0] 496 if switch_class.require_caches() and \ 497 not options.caches: 498 print("%s: Must be used with caches" % str(switch_class)) 499 sys.exit(1) 500 if not switch_class.support_take_over(): 501 print("%s: CPU switching not supported" % str(switch_class)) 502 sys.exit(1) 503 504 repeat_switch_cpus = [switch_class(switched_out=True, \ | 493 494 if options.repeat_switch: 495 switch_class = getCPUClass(options.cpu_type)[0] 496 if switch_class.require_caches() and \ 497 not options.caches: 498 print("%s: Must be used with caches" % str(switch_class)) 499 sys.exit(1) 500 if not switch_class.support_take_over(): 501 print("%s: CPU switching not supported" % str(switch_class)) 502 sys.exit(1) 503 504 repeat_switch_cpus = [switch_class(switched_out=True, \ |
| 505 cpu_id=(i)) for i in xrange(np)] | 505 cpu_id=(i)) for i in range(np)] |
| 506 | 506 |
| 507 for i in xrange(np): | 507 for i in range(np): |
| 508 repeat_switch_cpus[i].system = testsys 509 repeat_switch_cpus[i].workload = testsys.cpu[i].workload 510 repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 511 repeat_switch_cpus[i].isa = testsys.cpu[i].isa 512 513 if options.maxinsts: 514 repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts 515 516 if options.checker: 517 repeat_switch_cpus[i].addCheckerCpu() 518 519 testsys.repeat_switch_cpus = repeat_switch_cpus 520 521 if cpu_class: 522 repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i]) | 508 repeat_switch_cpus[i].system = testsys 509 repeat_switch_cpus[i].workload = testsys.cpu[i].workload 510 repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 511 repeat_switch_cpus[i].isa = testsys.cpu[i].isa 512 513 if options.maxinsts: 514 repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts 515 516 if options.checker: 517 repeat_switch_cpus[i].addCheckerCpu() 518 519 testsys.repeat_switch_cpus = repeat_switch_cpus 520 521 if cpu_class: 522 repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i]) |
| 523 for i in xrange(np)] | 523 for i in range(np)] |
| 524 else: 525 repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i]) | 524 else: 525 repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i]) |
| 526 for i in xrange(np)] | 526 for i in range(np)] |
| 527 528 if options.standard_switch: 529 switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i)) | 527 528 if options.standard_switch: 529 switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i)) |
| 530 for i in xrange(np)] | 530 for i in range(np)] |
| 531 switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i)) | 531 switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i)) |
| 532 for i in xrange(np)] | 532 for i in range(np)] |
| 533 | 533 |
| 534 for i in xrange(np): | 534 for i in range(np): |
| 535 switch_cpus[i].system = testsys 536 switch_cpus_1[i].system = testsys 537 switch_cpus[i].workload = testsys.cpu[i].workload 538 switch_cpus_1[i].workload = testsys.cpu[i].workload 539 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 540 switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain 541 switch_cpus[i].isa = testsys.cpu[i].isa 542 switch_cpus_1[i].isa = testsys.cpu[i].isa --- 24 unchanged lines hidden (view full) --- 567 568 # attach the checker cpu if selected 569 if options.checker: 570 switch_cpus[i].addCheckerCpu() 571 switch_cpus_1[i].addCheckerCpu() 572 573 testsys.switch_cpus = switch_cpus 574 testsys.switch_cpus_1 = switch_cpus_1 | 535 switch_cpus[i].system = testsys 536 switch_cpus_1[i].system = testsys 537 switch_cpus[i].workload = testsys.cpu[i].workload 538 switch_cpus_1[i].workload = testsys.cpu[i].workload 539 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 540 switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain 541 switch_cpus[i].isa = testsys.cpu[i].isa 542 switch_cpus_1[i].isa = testsys.cpu[i].isa --- 24 unchanged lines hidden (view full) --- 567 568 # attach the checker cpu if selected 569 if options.checker: 570 switch_cpus[i].addCheckerCpu() 571 switch_cpus_1[i].addCheckerCpu() 572 573 testsys.switch_cpus = switch_cpus 574 testsys.switch_cpus_1 = switch_cpus_1 |
| 575 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] 576 switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)] | 575 switch_cpu_list = [ 576 (testsys.cpu[i], switch_cpus[i]) for i in range(np) 577 ] 578 switch_cpu_list1 = [ 579 (switch_cpus[i], switch_cpus_1[i]) for i in range(np) 580 ] |
| 577 578 # set the checkpoint in the cpu before m5.instantiate is called 579 if options.take_checkpoints != None and \ 580 (options.simpoint or options.at_instruction): 581 offset = int(options.take_checkpoints) 582 # Set an instruction break point 583 if options.simpoint: | 581 582 # set the checkpoint in the cpu before m5.instantiate is called 583 if options.take_checkpoints != None and \ 584 (options.simpoint or options.at_instruction): 585 offset = int(options.take_checkpoints) 586 # Set an instruction break point 587 if options.simpoint: |
| 584 for i in xrange(np): | 588 for i in range(np): |
| 585 if testsys.cpu[i].workload[0].simpoint == 0: 586 fatal('no simpoint for testsys.cpu[%d].workload[0]', i) 587 checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset 588 testsys.cpu[i].max_insts_any_thread = checkpoint_inst 589 # used for output below 590 options.take_checkpoints = checkpoint_inst 591 else: 592 options.take_checkpoints = offset 593 # Set all test cpus with the right number of instructions 594 # for the upcoming simulation | 589 if testsys.cpu[i].workload[0].simpoint == 0: 590 fatal('no simpoint for testsys.cpu[%d].workload[0]', i) 591 checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset 592 testsys.cpu[i].max_insts_any_thread = checkpoint_inst 593 # used for output below 594 options.take_checkpoints = checkpoint_inst 595 else: 596 options.take_checkpoints = offset 597 # Set all test cpus with the right number of instructions 598 # for the upcoming simulation |
| 595 for i in xrange(np): | 599 for i in range(np): |
| 596 testsys.cpu[i].max_insts_any_thread = offset 597 598 if options.take_simpoint_checkpoints != None: 599 simpoints, interval_length = parseSimpointAnalysisFile(options, testsys) 600 601 checkpoint_dir = None 602 if options.checkpoint_restore: 603 cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys) --- 122 unchanged lines hidden --- | 600 testsys.cpu[i].max_insts_any_thread = offset 601 602 if options.take_simpoint_checkpoints != None: 603 simpoints, interval_length = parseSimpointAnalysisFile(options, testsys) 604 605 checkpoint_dir = None 606 if options.checkpoint_restore: 607 cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys) --- 122 unchanged lines hidden --- |