Simulation.py (11688:725fef71f376) | Simulation.py (12374:df27dd3da16d) |
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1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 450 unchanged lines hidden (view full) --- 459 for i in xrange(np): 460 if options.fast_forward: 461 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 462 switch_cpus[i].system = testsys 463 switch_cpus[i].workload = testsys.cpu[i].workload 464 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 465 switch_cpus[i].progress_interval = \ 466 testsys.cpu[i].progress_interval | 1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 450 unchanged lines hidden (view full) --- 459 for i in xrange(np): 460 if options.fast_forward: 461 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 462 switch_cpus[i].system = testsys 463 switch_cpus[i].workload = testsys.cpu[i].workload 464 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 465 switch_cpus[i].progress_interval = \ 466 testsys.cpu[i].progress_interval |
467 switch_cpus[i].isa = testsys.cpu[i].isa |
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467 # simulation period 468 if options.maxinsts: 469 switch_cpus[i].max_insts_any_thread = options.maxinsts 470 # Add checker cpu if selected 471 if options.checker: 472 switch_cpus[i].addCheckerCpu() 473 474 # If elastic tracing is enabled attach the elastic trace probe --- 16 unchanged lines hidden (view full) --- 491 492 repeat_switch_cpus = [switch_class(switched_out=True, \ 493 cpu_id=(i)) for i in xrange(np)] 494 495 for i in xrange(np): 496 repeat_switch_cpus[i].system = testsys 497 repeat_switch_cpus[i].workload = testsys.cpu[i].workload 498 repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain | 468 # simulation period 469 if options.maxinsts: 470 switch_cpus[i].max_insts_any_thread = options.maxinsts 471 # Add checker cpu if selected 472 if options.checker: 473 switch_cpus[i].addCheckerCpu() 474 475 # If elastic tracing is enabled attach the elastic trace probe --- 16 unchanged lines hidden (view full) --- 492 493 repeat_switch_cpus = [switch_class(switched_out=True, \ 494 cpu_id=(i)) for i in xrange(np)] 495 496 for i in xrange(np): 497 repeat_switch_cpus[i].system = testsys 498 repeat_switch_cpus[i].workload = testsys.cpu[i].workload 499 repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain |
500 repeat_switch_cpus[i].isa = testsys.cpu[i].isa |
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499 500 if options.maxinsts: 501 repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts 502 503 if options.checker: 504 repeat_switch_cpus[i].addCheckerCpu() 505 506 testsys.repeat_switch_cpus = repeat_switch_cpus --- 13 unchanged lines hidden (view full) --- 520 521 for i in xrange(np): 522 switch_cpus[i].system = testsys 523 switch_cpus_1[i].system = testsys 524 switch_cpus[i].workload = testsys.cpu[i].workload 525 switch_cpus_1[i].workload = testsys.cpu[i].workload 526 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 527 switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain | 501 502 if options.maxinsts: 503 repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts 504 505 if options.checker: 506 repeat_switch_cpus[i].addCheckerCpu() 507 508 testsys.repeat_switch_cpus = repeat_switch_cpus --- 13 unchanged lines hidden (view full) --- 522 523 for i in xrange(np): 524 switch_cpus[i].system = testsys 525 switch_cpus_1[i].system = testsys 526 switch_cpus[i].workload = testsys.cpu[i].workload 527 switch_cpus_1[i].workload = testsys.cpu[i].workload 528 switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain 529 switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain |
530 switch_cpus[i].isa = testsys.cpu[i].isa 531 switch_cpus_1[i].isa = testsys.cpu[i].isa |
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528 529 # if restoring, make atomic cpu simulate only a few instructions 530 if options.checkpoint_restore != None: 531 testsys.cpu[i].max_insts_any_thread = 1 532 # Fast forward to specified location if we are not restoring 533 elif options.fast_forward: 534 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 535 # Fast forward to a simpoint (warning: time consuming) --- 173 unchanged lines hidden --- | 532 533 # if restoring, make atomic cpu simulate only a few instructions 534 if options.checkpoint_restore != None: 535 testsys.cpu[i].max_insts_any_thread = 1 536 # Fast forward to specified location if we are not restoring 537 elif options.fast_forward: 538 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 539 # Fast forward to a simpoint (warning: time consuming) --- 173 unchanged lines hidden --- |