1# Copyright (c) 2012 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 30 unchanged lines hidden (view full) --- 39# 40# Authors: Lisa Hsu 41 42import sys 43from os import getcwd 44from os.path import join as joinpath 45 46import CpuConfig |
47import MemConfig |
48 49import m5 50from m5.defines import buildEnv 51from m5.objects import * 52from m5.util import * 53 54addToPath('../common') 55 --- 24 unchanged lines hidden (view full) --- 80 TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu) 81 elif options.fast_forward: 82 CPUClass = TmpClass 83 TmpClass = AtomicSimpleCPU 84 test_mem_mode = 'atomic' 85 86 return (TmpClass, test_mem_mode, CPUClass) 87 |
88def setMemClass(options): 89 """Returns a memory controller class.""" 90 91 return MemConfig.get(options.mem_type) 92 |
93def setWorkCountOptions(system, options): 94 if options.work_item_id != None: 95 system.work_item_id = options.work_item_id 96 if options.work_begin_cpu_id_exit != None: 97 system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit 98 if options.work_end_exit_count != None: 99 system.work_end_exit_count = options.work_end_exit_count 100 if options.work_end_checkpoint_count != None: --- 392 unchanged lines hidden --- |