1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 583 unchanged lines hidden (view full) --- 592 testsys.cpu[i].max_insts_any_thread = offset 593 594 if options.take_simpoint_checkpoints != None: 595 simpoints, interval_length = parseSimpointAnalysisFile(options, testsys) 596 597 checkpoint_dir = None 598 if options.checkpoint_restore: 599 cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys) |
600 root.apply_config(options.param) |
601 m5.instantiate(checkpoint_dir) 602 603 # Initialization is complete. If we're not in control of simulation 604 # (that is, if we're a slave simulator acting as a component in another 605 # 'master' simulator) then we're done here. The other simulator will 606 # call simulate() directly. --initialize-only is used to indicate this. 607 if options.initialize_only: 608 return --- 113 unchanged lines hidden --- |