1c1
< # Copyright (c) 2012 ARM Limited
---
> # Copyright (c) 2012-2013 ARM Limited
311c311
< switch_cpus[i].clock = testsys.cpu[i].clock
---
> switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
338c338
< repeat_switch_cpus[i].clock = testsys.cpu[i].clock
---
> repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
366,367c366,367
< switch_cpus[i].clock = testsys.cpu[i].clock
< switch_cpus_1[i].clock = testsys.cpu[i].clock
---
> switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
> switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain