30d29
< from os.path import join as joinpath
68c67
< maxtick = m5.MaxTick
---
> maxtick = -1
88,91d86
< if options.caches:
< switch_cpus[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
< L1Cache(size = '64kB'))
< switch_cpus[i].connectMemPorts(testsys.membus)
111,115c106
< if options.caches:
< switch_cpus[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
< L1Cache(size = '64kB'))
< switch_cpus[i].connectMemPorts(testsys.membus)
< else:
---
> if not options.caches:
122,123c113,114
< root.switch_cpus = switch_cpus
< root.switch_cpus_1 = switch_cpus_1
---
> testsys.switch_cpus = switch_cpus
> testsys.switch_cpus_1 = switch_cpus_1
153c144
< joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1]))
---
> "/".join([cptdir, "cpt.%s" % cpts[cpt_num - 1]]))
188c179
< m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
---
> m5.checkpoint(root, "/".join([cptdir,"cpt.%d"]))
194c185
< if (sim_ticks + period) > maxtick:
---
> if (sim_ticks + period) > maxtick and maxtick != -1:
204c195
< m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
---
> m5.checkpoint(root, "/".join([cptdir,"cpt.%d"]))
211c202
< m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
---
> m5.checkpoint(root, "/".join([cptdir,"cpt.%d"]))
217c208,212
< exit_event = m5.simulate(maxtick - m5.curTick())
---
> if maxtick == -1:
> exit_event = m5.simulate(maxtick)
> else:
> exit_event = m5.simulate(maxtick - m5.curTick())
>
222c217
< print 'Exiting @ cycle', m5.curTick(), 'because ', exit_cause
---
> print 'Exiting @ cycle %i because %s' % (m5.curTick(), exit_cause)