1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# Copyright (c) 2010 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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124 if options.fast_forward:
125 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
126 switch_cpus[i].system = testsys
127 switch_cpus[i].workload = testsys.cpu[i].workload
128 switch_cpus[i].clock = testsys.cpu[0].clock
129 # simulation period
130 if options.maxinsts:
131 switch_cpus[i].max_insts_any_thread = options.maxinsts
132
133 testsys.switch_cpus = switch_cpus
134 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
135
136 if options.standard_switch:
137 if not options.caches:
138 # O3 CPU must have a cache to work.
139 print "O3 CPU must be used with caches"

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171 # warmup period
172 if options.warmup_insts:
173 switch_cpus[i].max_insts_any_thread = options.warmup_insts
174
175 # simulation period
176 if options.maxinsts:
177 switch_cpus_1[i].max_insts_any_thread = options.maxinsts
178
179 testsys.switch_cpus = switch_cpus
180 testsys.switch_cpus_1 = switch_cpus_1
181 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
182 switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
183
184 # set the checkpoint in the cpu before m5.instantiate is called
185 if options.take_checkpoints != None and \
186 (options.simpoint or options.at_instruction):

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