1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
--- 37 unchanged lines hidden (view full) ---
46 else:
47 class TmpClass(AtomicSimpleCPU): pass
48 atomic = True
49
50 CPUClass = None
51 test_mem_mode = 'atomic'
52
53 if not atomic:
54 if options.checkpoint_restore or options.fast_forward:
55 CPUClass = TmpClass
56 class TmpClass(AtomicSimpleCPU): pass
57 else:
58 test_mem_mode = 'timing'
59
60 return (TmpClass, test_mem_mode, CPUClass)
61
62
--- 19 unchanged lines hidden (view full) ---
82 switch_cpus = None
83
84 if cpu_class:
85 switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
86 for i in xrange(np)]
87
88 for i in xrange(np):
89 if options.fast_forward:
90 testsys.cpu[i].max_insts_any_thread = options.fast_forward
91 switch_cpus[i].system = testsys
92 if not m5.build_env['FULL_SYSTEM']:
93 switch_cpus[i].workload = testsys.cpu[i].workload
94 switch_cpus[i].clock = testsys.cpu[0].clock
95
96 testsys.switch_cpus = switch_cpus
97 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
98
99 if options.standard_switch:
100 switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
101 for i in xrange(np)]
102 switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
--- 4 unchanged lines hidden (view full) ---
107 switch_cpus_1[i].system = testsys
108 if not m5.build_env['FULL_SYSTEM']:
109 switch_cpus[i].workload = testsys.cpu[i].workload
110 switch_cpus_1[i].workload = testsys.cpu[i].workload
111 switch_cpus[i].clock = testsys.cpu[0].clock
112 switch_cpus_1[i].clock = testsys.cpu[0].clock
113
114 # if restoring, make atomic cpu simulate only a few instructions
115 if options.checkpoint_restore:
116 testsys.cpu[i].max_insts_any_thread = 1
117 # Fast forward to specified location if we are not restoring
118 elif options.fast_forward:
119 testsys.cpu[i].max_insts_any_thread = options.fast_forward
120 # Fast forward to a simpoint (warning: time consuming)
121 elif options.simpoint:
122 if testsys.cpu[i].workload[0].simpoint == None:
123 m5.panic('simpoint not found')
124 testsys.cpu[i].max_insts_any_thread = \
125 testsys.cpu[i].workload[0].simpoint
126 # No distance specified, just switch
127 else:
--- 14 unchanged lines hidden (view full) ---
142 switch_cpus_1[i].connectMemPorts(testsys.membus)
143
144 testsys.switch_cpus = switch_cpus
145 testsys.switch_cpus_1 = switch_cpus_1
146 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
147 switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
148
149 # set the checkpoint in the cpu before m5.instantiate is called
150 if options.take_checkpoints and \
151 (options.simpoint or options.at_instruction):
152 offset = int(options.take_checkpoints)
153 # Set an instruction break point
154 if options.simpoint:
155 for i in xrange(np):
156 if testsys.cpu[i].workload[0].simpoint == None:
157 m5.panic('no simpoint for testsys.cpu[%d].workload[0]' % i)
158 checkpoint_inst = testsys.cpu[i].workload[0].simpoint + offset
159 testsys.cpu[i].max_insts_any_thread = checkpoint_inst
160 # used for output below
161 options.take_checkpoints = checkpoint_inst
162 else:
163 options.take_checkpoints = offset
164 # Set all test cpus with the right number of instructions
165 # for the upcoming simulation
166 for i in xrange(np):
167 testsys.cpu[i].max_insts_any_thread = offset
168
169 testsys.cpu_switch_list = cpu_switch_list
170
171 m5.instantiate(root)
172
173 if options.checkpoint_restore:
174 from os.path import isdir, exists
175 from os import listdir
176 import re
177
178 if not isdir(cptdir):
179 m5.panic("checkpoint dir %s does not exist!" % cptdir)
180
181 if options.at_instruction:
182 checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % \
183 (options.bench, options.checkpoint_restore))
184 if not exists(checkpoint_dir):
185 m5.panic("Unable to find checkpoint directory %s" % \
186 checkpoint_dir)
187
188 print "Restoring checkpoint ..."
189 m5.restoreCheckpoint(root, checkpoint_dir)
190 print "Done."
191 elif options.simpoint:
192 # assume workload 0 has the simpoint
193 if testsys.cpu[i].workload[0].simpoint == None:
194 m5.panic('Unable to find simpoint')
195
196 options.checkpoint_restore += \
197 testsys.cpu[0].workload[0].simpoint
198
199 checkpoint_dir = joinpath(cptdir, "cpt.%s.%d" % \
200 (options.bench, options.checkpoint_restore))
201 if not exists(checkpoint_dir):
202 m5.panic("Unable to find checkpoint directory %s.%s" % \
203 (options.bench, options.checkpoint_restore))
204
205 print "Restoring checkpoint ..."
--- 64 unchanged lines hidden (view full) ---
270
271 num_checkpoints = 0
272 exit_cause = ''
273
274 # Checkpoints being taken via the command line at <when> and at
275 # subsequent periods of <period>. Checkpoint instructions
276 # received from the benchmark running are ignored and skipped in
277 # favor of command line checkpoint instructions.
278 if options.take_checkpoints:
279 when, period = options.take_checkpoints.split(",", 1)
280 when = int(when)
281 period = int(period)
282
283 if options.at_instruction or options.simpoint:
284 checkpoint_inst = when
285
286 # maintain correct offset if we restored from some instruction
287 if options.checkpoint_restore:
288 checkpoint_inst += options.checkpoint_restore
289
290 print "Creating checkpoint at inst:%d" % (checkpoint_inst)
291 exit_event = m5.simulate()
292 print "exit cause = %s" % (exit_event.getCause())
293
294 # skip checkpoint instructions should they exist
295 while exit_event.getCause() == "checkpoint":
--- 4 unchanged lines hidden (view full) ---
300 m5.checkpoint(root, joinpath(cptdir, "cpt.%s.%d" % \
301 (options.bench, checkpoint_inst)))
302 print "Checkpoint written."
303 num_checkpoints += 1
304
305 if exit_event.getCause() == "user interrupt received":
306 exit_cause = exit_event.getCause();
307 else:
308 exit_event = m5.simulate(when)
309 while exit_event.getCause() == "checkpoint":
310 exit_event = m5.simulate(when - m5.curTick())
311
312 if exit_event.getCause() == "simulate() limit reached":
313 m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
314 num_checkpoints += 1
315
--- 40 unchanged lines hidden ---
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
--- 37 unchanged lines hidden (view full) ---
46 else:
47 class TmpClass(AtomicSimpleCPU): pass
48 atomic = True
49
50 CPUClass = None
51 test_mem_mode = 'atomic'
52
53 if not atomic:
54 if options.checkpoint_restore or options.fast_forward:
55 CPUClass = TmpClass
56 class TmpClass(AtomicSimpleCPU): pass
57 else:
58 test_mem_mode = 'timing'
59
60 return (TmpClass, test_mem_mode, CPUClass)
61
62
--- 19 unchanged lines hidden (view full) ---
82 switch_cpus = None
83
84 if cpu_class:
85 switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
86 for i in xrange(np)]
87
88 for i in xrange(np):
89 if options.fast_forward:
90 testsys.cpu[i].max_insts_any_thread = options.fast_forward
91 switch_cpus[i].system = testsys
92 if not m5.build_env['FULL_SYSTEM']:
93 switch_cpus[i].workload = testsys.cpu[i].workload
94 switch_cpus[i].clock = testsys.cpu[0].clock
95
96 testsys.switch_cpus = switch_cpus
97 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
98
99 if options.standard_switch:
100 switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
101 for i in xrange(np)]
102 switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
--- 4 unchanged lines hidden (view full) ---
107 switch_cpus_1[i].system = testsys
108 if not m5.build_env['FULL_SYSTEM']:
109 switch_cpus[i].workload = testsys.cpu[i].workload
110 switch_cpus_1[i].workload = testsys.cpu[i].workload
111 switch_cpus[i].clock = testsys.cpu[0].clock
112 switch_cpus_1[i].clock = testsys.cpu[0].clock
113
114 # if restoring, make atomic cpu simulate only a few instructions
115 if options.checkpoint_restore:
116 testsys.cpu[i].max_insts_any_thread = 1
117 # Fast forward to specified location if we are not restoring
118 elif options.fast_forward:
119 testsys.cpu[i].max_insts_any_thread = options.fast_forward
120 # Fast forward to a simpoint (warning: time consuming)
121 elif options.simpoint:
122 if testsys.cpu[i].workload[0].simpoint == None:
123 m5.panic('simpoint not found')
124 testsys.cpu[i].max_insts_any_thread = \
125 testsys.cpu[i].workload[0].simpoint
126 # No distance specified, just switch
127 else:
--- 14 unchanged lines hidden (view full) ---
142 switch_cpus_1[i].connectMemPorts(testsys.membus)
143
144 testsys.switch_cpus = switch_cpus
145 testsys.switch_cpus_1 = switch_cpus_1
146 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
147 switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
148
149 # set the checkpoint in the cpu before m5.instantiate is called
150 if options.take_checkpoints and \
151 (options.simpoint or options.at_instruction):
152 offset = int(options.take_checkpoints)
153 # Set an instruction break point
154 if options.simpoint:
155 for i in xrange(np):
156 if testsys.cpu[i].workload[0].simpoint == None:
157 m5.panic('no simpoint for testsys.cpu[%d].workload[0]' % i)
158 checkpoint_inst = testsys.cpu[i].workload[0].simpoint + offset
159 testsys.cpu[i].max_insts_any_thread = checkpoint_inst
160 # used for output below
161 options.take_checkpoints = checkpoint_inst
162 else:
163 options.take_checkpoints = offset
164 # Set all test cpus with the right number of instructions
165 # for the upcoming simulation
166 for i in xrange(np):
167 testsys.cpu[i].max_insts_any_thread = offset
168
169 testsys.cpu_switch_list = cpu_switch_list
170
171 m5.instantiate(root)
172
173 if options.checkpoint_restore:
174 from os.path import isdir, exists
175 from os import listdir
176 import re
177
178 if not isdir(cptdir):
179 m5.panic("checkpoint dir %s does not exist!" % cptdir)
180
181 if options.at_instruction:
182 checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % \
183 (options.bench, options.checkpoint_restore))
184 if not exists(checkpoint_dir):
185 m5.panic("Unable to find checkpoint directory %s" % \
186 checkpoint_dir)
187
188 print "Restoring checkpoint ..."
189 m5.restoreCheckpoint(root, checkpoint_dir)
190 print "Done."
191 elif options.simpoint:
192 # assume workload 0 has the simpoint
193 if testsys.cpu[i].workload[0].simpoint == None:
194 m5.panic('Unable to find simpoint')
195
196 options.checkpoint_restore += \
197 testsys.cpu[0].workload[0].simpoint
198
199 checkpoint_dir = joinpath(cptdir, "cpt.%s.%d" % \
200 (options.bench, options.checkpoint_restore))
201 if not exists(checkpoint_dir):
202 m5.panic("Unable to find checkpoint directory %s.%s" % \
203 (options.bench, options.checkpoint_restore))
204
205 print "Restoring checkpoint ..."
--- 64 unchanged lines hidden (view full) ---
270
271 num_checkpoints = 0
272 exit_cause = ''
273
274 # Checkpoints being taken via the command line at <when> and at
275 # subsequent periods of <period>. Checkpoint instructions
276 # received from the benchmark running are ignored and skipped in
277 # favor of command line checkpoint instructions.
278 if options.take_checkpoints:
279 when, period = options.take_checkpoints.split(",", 1)
280 when = int(when)
281 period = int(period)
282
283 if options.at_instruction or options.simpoint:
284 checkpoint_inst = when
285
286 # maintain correct offset if we restored from some instruction
287 if options.checkpoint_restore:
288 checkpoint_inst += options.checkpoint_restore
289
290 print "Creating checkpoint at inst:%d" % (checkpoint_inst)
291 exit_event = m5.simulate()
292 print "exit cause = %s" % (exit_event.getCause())
293
294 # skip checkpoint instructions should they exist
295 while exit_event.getCause() == "checkpoint":
--- 4 unchanged lines hidden (view full) ---
300 m5.checkpoint(root, joinpath(cptdir, "cpt.%s.%d" % \
301 (options.bench, checkpoint_inst)))
302 print "Checkpoint written."
303 num_checkpoints += 1
304
305 if exit_event.getCause() == "user interrupt received":
306 exit_cause = exit_event.getCause();
307 else:
308 exit_event = m5.simulate(when)
309 while exit_event.getCause() == "checkpoint":
310 exit_event = m5.simulate(when - m5.curTick())
311
312 if exit_event.getCause() == "simulate() limit reached":
313 m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
314 num_checkpoints += 1
315
--- 40 unchanged lines hidden ---