1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 111 unchanged lines hidden (view full) --- 120 "specified including ticks from a restored checkpoint") 121 parser.add_option("--rel-max-tick", type="int", default=None, 122 metavar="TICKS", help="Simulate for specified number of" 123 " ticks relative to the simulation start tick (e.g. if " 124 "restoring a checkpoint)") 125 parser.add_option("--maxtime", type="float", default=None, 126 help="Run to the specified absolute simulated time in " 127 "seconds") |
128 parser.add_option("-P", "--param", action="append", default=[], 129 help="Set a SimObject parameter relative to the root node. " 130 "An extended Python multi range slicing syntax can be used " 131 "for arrays. For example: " 132 "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' " 133 "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 " 134 "Direct parameters of the root object are not accessible, " 135 "only parameters of its children.") |
136 137# Add common options that assume a non-NULL ISA. 138def addCommonOptions(parser): 139 # start by adding the base options that do not assume an ISA 140 addNoISAOptions(parser) 141 142 # system options 143 parser.add_option("--list-cpu-types", --- 237 unchanged lines hidden --- |