MemConfig.py (9709:fe54045c8670) MemConfig.py (9728:7daeab1685e9)
1# Copyright (c) 2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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45# classes.
46_mem_classes = {}
47
48# Memory aliases. We make sure they exist before we add them to the
49# fina; list. A target may be specified as a tuple, in which case the
50# first available memory controller model in the tuple will be used.
51_mem_aliases_all = [
52 ("simple_mem", "SimpleMemory"),
1# Copyright (c) 2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 36 unchanged lines hidden (view full) ---

45# classes.
46_mem_classes = {}
47
48# Memory aliases. We make sure they exist before we add them to the
49# fina; list. A target may be specified as a tuple, in which case the
50# first available memory controller model in the tuple will be used.
51_mem_aliases_all = [
52 ("simple_mem", "SimpleMemory"),
53 ("ddr3-1600", "SimpleDDR3"),
54 ("lpddr2_s4-1066", "SimpleLPDDR2_S4"),
55 ("lpddr3-1600", "SimpleLPDDR3"),
56 ("wio-200", "SimpleWideIO"),
53 ("ddr3_1600_x64", "DDR3_1600_x64"),
54 ("lpddr2_s4_1066_x32", "LPDDR2_S4_1066_x32"),
55 ("lpddr3_1600_x32", "LPDDR3_1600_x32"),
56 ("wio_200_x128", "WideIO_200_x128"),
57 ]
58
59# Filtered list of aliases. Only aliases for existing memory
60# controllers exist in this list.
61_mem_aliases = {}
62
63
64def is_mem_class(cls):

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58
59# Filtered list of aliases. Only aliases for existing memory
60# controllers exist in this list.
61_mem_aliases = {}
62
63
64def is_mem_class(cls):

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