MemConfig.py (11818:f12963cb9dc2) | MemConfig.py (11837:17b37f38944a) |
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1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 138 unchanged lines hidden (view full) --- 147 148 If requested, we make a multi-channel configuration of the 149 selected memory controller class by creating multiple instances of 150 the specific class. The individual controllers have their 151 parameters set such that the address range is interleaved between 152 them. 153 """ 154 | 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 138 unchanged lines hidden (view full) --- 147 148 If requested, we make a multi-channel configuration of the 149 selected memory controller class by creating multiple instances of 150 the specific class. The individual controllers have their 151 parameters set such that the address range is interleaved between 152 them. 153 """ 154 |
155 if ( options.mem_type == "HMC_2500_x32"): | 155 if ( options.mem_type == "HMC_2500_1x32"): |
156 HMChost = HMC.config_host_hmc(options, system) 157 HMC.config_hmc(options, system, HMChost.hmc_host) 158 subsystem = system.hmc_dev 159 xbar = system.hmc_dev.xbar 160 else: 161 subsystem = system 162 xbar = system.membus 163 --- 54 unchanged lines hidden (view full) --- 218 "latency to 1ns." 219 220 mem_ctrls.append(mem_ctrl) 221 222 subsystem.mem_ctrls = mem_ctrls 223 224 # Connect the controllers to the membus 225 for i in xrange(len(subsystem.mem_ctrls)): | 156 HMChost = HMC.config_host_hmc(options, system) 157 HMC.config_hmc(options, system, HMChost.hmc_host) 158 subsystem = system.hmc_dev 159 xbar = system.hmc_dev.xbar 160 else: 161 subsystem = system 162 xbar = system.membus 163 --- 54 unchanged lines hidden (view full) --- 218 "latency to 1ns." 219 220 mem_ctrls.append(mem_ctrl) 221 222 subsystem.mem_ctrls = mem_ctrls 223 224 # Connect the controllers to the membus 225 for i in xrange(len(subsystem.mem_ctrls)): |
226 if (options.mem_type == "HMC_2500_x32"): | 226 if (options.mem_type == "HMC_2500_1x32"): |
227 subsystem.mem_ctrls[i].port = xbar[i/4].master 228 else: 229 subsystem.mem_ctrls[i].port = xbar.master | 227 subsystem.mem_ctrls[i].port = xbar[i/4].master 228 else: 229 subsystem.mem_ctrls[i].port = xbar.master |