| MemConfig.py (10789:e94c22bd9ef1) | MemConfig.py (10993:4e27d8806403) |
|---|---|
| 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 137 unchanged lines hidden (view full) --- 146 147 If requested, we make a multi-channel configuration of the 148 selected memory controller class by creating multiple instances of 149 the specific class. The individual controllers have their 150 parameters set such that the address range is interleaved between 151 them. 152 """ 153 | 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 137 unchanged lines hidden (view full) --- 146 147 If requested, we make a multi-channel configuration of the 148 selected memory controller class by creating multiple instances of 149 the specific class. The individual controllers have their 150 parameters set such that the address range is interleaved between 151 them. 152 """ 153 |
| 154 if options.tlm_memory: 155 system.external_memory = m5.objects.ExternalSlave( 156 port_type="tlm", 157 port_data=options.tlm_memory, 158 port=system.membus.master, 159 addr_ranges=system.mem_ranges) 160 system.kernel_addr_check = False 161 return 162 |
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| 154 if options.external_memory_system: 155 system.external_memory = m5.objects.ExternalSlave( 156 port_type=options.external_memory_system, 157 port_data="init_mem0", port=system.membus.master, 158 addr_ranges=system.mem_ranges) 159 system.kernel_addr_check = False 160 return 161 --- 36 unchanged lines hidden --- | 163 if options.external_memory_system: 164 system.external_memory = m5.objects.ExternalSlave( 165 port_type=options.external_memory_system, 166 port_data="init_mem0", port=system.membus.master, 167 addr_ranges=system.mem_ranges) 168 system.kernel_addr_check = False 169 return 170 --- 36 unchanged lines hidden --- |