| MemConfig.py (10677:5935ab1ddd7a) | MemConfig.py (10780:46070443051e) |
|---|---|
| 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 175 unchanged lines hidden (view full) --- 184 185 If requested, we make a multi-channel configuration of the 186 selected memory controller class by creating multiple instances of 187 the specific class. The individual controllers have their 188 parameters set such that the address range is interleaved between 189 them. 190 """ 191 | 1# Copyright (c) 2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 175 unchanged lines hidden (view full) --- 184 185 If requested, we make a multi-channel configuration of the 186 selected memory controller class by creating multiple instances of 187 the specific class. The individual controllers have their 188 parameters set such that the address range is interleaved between 189 them. 190 """ 191 |
| 192 if options.external_memory_system: 193 system.external_memory = m5.objects.ExternalSlave( 194 port_type=options.external_memory_system, 195 port_data="init_mem0", port=system.membus.master, 196 addr_ranges=system.mem_ranges) 197 system.kernel_addr_check = False 198 return 199 |
|
| 192 nbr_mem_ctrls = options.mem_channels 193 import math 194 from m5.util import fatal 195 intlv_bits = int(math.log(nbr_mem_ctrls, 2)) 196 if 2 ** intlv_bits != nbr_mem_ctrls: 197 fatal("Number of memory channels must be a power of 2") 198 199 cls = get(options.mem_type) --- 28 unchanged lines hidden --- | 200 nbr_mem_ctrls = options.mem_channels 201 import math 202 from m5.util import fatal 203 intlv_bits = int(math.log(nbr_mem_ctrls, 2)) 204 if 2 ** intlv_bits != nbr_mem_ctrls: 205 fatal("Number of memory channels must be a power of 2") 206 207 cls = get(options.mem_type) --- 28 unchanged lines hidden --- |