1# Copyright (c) 2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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148 If requested, we make a multi-channel configuration of the
149 selected memory controller class by creating multiple instances of
150 the specific class. The individual controllers have their
151 parameters set such that the address range is interleaved between
152 them.
153 """
154
155 if ( options.mem_type == "HMC_2500_x32"):
156 HMC.config_hmc(options, system)
157 subsystem = system.hmc
158 xbar = system.hmc.xbar
159 else:
160 subsystem = system
161 xbar = system.membus
162
163 if options.tlm_memory:
164 system.external_memory = m5.objects.ExternalSlave(
165 port_type="tlm",
166 port_data=options.tlm_memory,

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217 "latency to 1ns."
218
219 mem_ctrls.append(mem_ctrl)
220
221 subsystem.mem_ctrls = mem_ctrls
222
223 # Connect the controllers to the membus
224 for i in xrange(len(subsystem.mem_ctrls)):
225 subsystem.mem_ctrls[i].port = xbar.master