FileSystemConfig.py (13885:d10ea5e56cb0) FileSystemConfig.py (13952:197e72db5ab0)
1# Copyright (c) 2015 Advanced Micro Devices, Inc.
2# All rights reserved
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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55def config_filesystem(options):
56 fsdir = joinpath(m5.options.outdir, 'fs')
57 replace_tree(fsdir)
58
59 # Set up /proc
60 procdir = joinpath(fsdir, 'proc')
61 mkdir(procdir)
62
1# Copyright (c) 2015 Advanced Micro Devices, Inc.
2# All rights reserved
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 46 unchanged lines hidden (view full) ---

55def config_filesystem(options):
56 fsdir = joinpath(m5.options.outdir, 'fs')
57 replace_tree(fsdir)
58
59 # Set up /proc
60 procdir = joinpath(fsdir, 'proc')
61 mkdir(procdir)
62
63 cpu_clock = '0'
64 if hasattr(options, 'cpu_clock'):
65 cpu_clock = options.cpu_clock
66 cpu_clock = toFrequency(cpu_clock)/mega
67
68 l2_size = '0'
69 if hasattr(options, 'l2_size'):
70 l2_size = options.l2_size
71 l2_size = toMemorySize(l2_size)/kibi
72
73 cacheline_size = '0'
74 if hasattr(options, 'cacheline_size'):
75 cacheline_size = options.cacheline_size
76
63 for i in xrange(options.num_cpus):
64 one_cpu = 'processor : %d\n' % (i) + \
65 'vendor_id : Generic\n' + \
66 'cpu family : 0\n' + \
67 'model : 0\n' + \
68 'model name : Generic\n' + \
69 'stepping : 0\n' + \
70 'cpu MHz : %0.3d\n' \
77 for i in xrange(options.num_cpus):
78 one_cpu = 'processor : %d\n' % (i) + \
79 'vendor_id : Generic\n' + \
80 'cpu family : 0\n' + \
81 'model : 0\n' + \
82 'model name : Generic\n' + \
83 'stepping : 0\n' + \
84 'cpu MHz : %0.3d\n' \
71 % (toFrequency(options.cpu_clock)/mega) + \
85 % cpu_clock + \
72 'cache size: : %dK\n' \
86 'cache size: : %dK\n' \
73 % (toMemorySize(options.l2_size)/kibi) + \
87 % l2_size + \
74 'physical id : 0\n' + \
75 'siblings : %s\n' \
76 % options.num_cpus + \
77 'core id : %d\n' \
78 % i + \
79 'cpu cores : %d\n' \
80 % options.num_cpus + \
81 'fpu : yes\n' + \
82 'fpu exception : yes\n' + \
83 'cpuid level : 1\n' + \
84 'wp : yes\n' + \
85 'flags : fpu\n' + \
86 'cache alignment : %d\n' \
88 'physical id : 0\n' + \
89 'siblings : %s\n' \
90 % options.num_cpus + \
91 'core id : %d\n' \
92 % i + \
93 'cpu cores : %d\n' \
94 % options.num_cpus + \
95 'fpu : yes\n' + \
96 'fpu exception : yes\n' + \
97 'cpuid level : 1\n' + \
98 'wp : yes\n' + \
99 'flags : fpu\n' + \
100 'cache alignment : %d\n' \
87 % options.cacheline_size + \
101 % cacheline_size + \
88 '\n'
89 file_append((procdir, 'cpuinfo'), one_cpu)
90
91 file_append((procdir, 'stat'), 'cpu 0 0 0 0 0 0 0\n')
92 for i in xrange(options.num_cpus):
93 file_append((procdir, 'stat'), 'cpu%d 0 0 0 0 0 0 0\n' % i)
94
95 # Set up /sys

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103 file_append((procdir, 'cpuinfo'), one_cpu)
104
105 file_append((procdir, 'stat'), 'cpu 0 0 0 0 0 0 0\n')
106 for i in xrange(options.num_cpus):
107 file_append((procdir, 'stat'), 'cpu%d 0 0 0 0 0 0 0\n' % i)
108
109 # Set up /sys

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