FSConfig.py (8919:c1366a30d5eb) FSConfig.py (8929:4148f9af0b70)
1# Copyright (c) 2010-2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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129 self.disk0 = CowIdeDisk(driveID='master')
130 self.disk2 = CowIdeDisk(driveID='master')
131 self.disk0.childImage(mdesc.disk())
132 self.disk2.childImage(disk('linux-bigswap2.img'))
133 self.tsunami = BaseTsunami()
134 self.tsunami.attachIO(self.piobus)
135 self.tsunami.ide.pio = self.piobus.master
136 self.tsunami.ide.config = self.piobus.master
1# Copyright (c) 2010-2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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129 self.disk0 = CowIdeDisk(driveID='master')
130 self.disk2 = CowIdeDisk(driveID='master')
131 self.disk0.childImage(mdesc.disk())
132 self.disk2.childImage(disk('linux-bigswap2.img'))
133 self.tsunami = BaseTsunami()
134 self.tsunami.attachIO(self.piobus)
135 self.tsunami.ide.pio = self.piobus.master
136 self.tsunami.ide.config = self.piobus.master
137 self.tsunami.ide.dma = self.piobus.slave
138 self.tsunami.ethernet.pio = self.piobus.master
139 self.tsunami.ethernet.config = self.piobus.master
137 self.tsunami.ethernet.pio = self.piobus.master
138 self.tsunami.ethernet.config = self.piobus.master
140 self.tsunami.ethernet.dma = self.piobus.slave
141
142 #
143 # Store the dma devices for later connection to dma ruby ports.
144 # Append an underscore to dma_devices to avoid the SimObjectVector check.
145 #
139
140 #
141 # Store the dma devices for later connection to dma ruby ports.
142 # Append an underscore to dma_devices to avoid the SimObjectVector check.
143 #
146 self._dma_devices = [self.tsunami.ide, self.tsunami.ethernet]
144 self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
147
148 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
149 read_only = True))
150 self.intrctrl = IntrControl()
151 self.mem_mode = mem_mode
152 self.terminal = Terminal()
153 self.kernel = binary('vmlinux')
154 self.pal = binary('ts_osfpal')

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403 x86_sys.piobus = Bus(bus_id=0)
404
405 #
406 # Pio functional accesses from devices need direct access to memory
407 # RubyPort currently does support functional accesses. Therefore provide
408 # the piobus a direct connection to physical memory
409 #
410 x86_sys.piobus.master = x86_sys.physmem.port
145
146 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
147 read_only = True))
148 self.intrctrl = IntrControl()
149 self.mem_mode = mem_mode
150 self.terminal = Terminal()
151 self.kernel = binary('vmlinux')
152 self.pal = binary('ts_osfpal')

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401 x86_sys.piobus = Bus(bus_id=0)
402
403 #
404 # Pio functional accesses from devices need direct access to memory
405 # RubyPort currently does support functional accesses. Therefore provide
406 # the piobus a direct connection to physical memory
407 #
408 x86_sys.piobus.master = x86_sys.physmem.port
409 # add the ide to the list of dma devices that later need to attach to
410 # dma controllers
411 x86_sys._dma_ports = [x86_sys.pc.south_bridge.ide.dma]
412 x86_sys.pc.attachIO(x86_sys.piobus, x86_sys._dma_ports)
411
413
412 x86_sys.pc.attachIO(x86_sys.piobus)
413
414
414
415def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False):
416 if self == None:
417 self = X86System()
418
419 if not mdesc:
420 # generic system
421 mdesc = SysConfig()
422 self.readfile = mdesc.script()

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427 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
428
429 # Platform
430 self.pc = Pc()
431
432 # Create and connect the busses required by each memory system
433 if Ruby:
434 connectX86RubySystem(self)
415def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False):
416 if self == None:
417 self = X86System()
418
419 if not mdesc:
420 # generic system
421 mdesc = SysConfig()
422 self.readfile = mdesc.script()

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427 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
428
429 # Platform
430 self.pc = Pc()
431
432 # Create and connect the busses required by each memory system
433 if Ruby:
434 connectX86RubySystem(self)
435 # add the ide to the list of dma devices that later need to attach to
436 # dma controllers
437 self._dma_devices = [self.pc.south_bridge.ide]
438 else:
439 connectX86ClassicSystem(self, numCPUs)
440
441 self.intrctrl = IntrControl()
442
443 # Disks
444 disk0 = CowIdeDisk(driveID='master')
445 disk2 = CowIdeDisk(driveID='master')

--- 185 unchanged lines hidden --- 		435 else:
436 connectX86ClassicSystem(self, numCPUs)
437
438 self.intrctrl = IntrControl()
439
440 # Disks
441 disk0 = CowIdeDisk(driveID='master')
442 disk2 = CowIdeDisk(driveID='master')

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