FSConfig.py (7869:e9edb137c872) FSConfig.py (7905:00ad807ed2ca)
1# Copyright (c) 2010 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
1# Copyright (c) 2010 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2010-2011 Advanced Micro Devices, Inc.
13# Copyright (c) 2006-2008 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright

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281 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
282
283 return self
284
285def x86IOAddress(port):
286 IO_address_space_base = 0x8000000000000000
287 return IO_address_space_base + port;
288
14# Copyright (c) 2006-2008 The Regents of The University of Michigan
15# All rights reserved.
16#
17# Redistribution and use in source and binary forms, with or without
18# modification, are permitted provided that the following conditions are
19# met: redistributions of source code must retain the above copyright
20# notice, this list of conditions and the following disclaimer;
21# redistributions in binary form must reproduce the above copyright

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282 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
283
284 return self
285
286def x86IOAddress(port):
287 IO_address_space_base = 0x8000000000000000
288 return IO_address_space_base + port;
289
289def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None):
290def connectX86ClassicSystem(x86_sys):
291 x86_sys.membus = MemBus(bus_id=1)
292 x86_sys.physmem.port = x86_sys.membus.port
293
294 # North Bridge
295 x86_sys.iobus = Bus(bus_id=0)
296 x86_sys.bridge = Bridge(delay='50ns', nack_delay='4ns')
297 x86_sys.bridge.side_a = x86_sys.iobus.port
298 x86_sys.bridge.side_b = x86_sys.membus.port
299
300 # connect the io bus
301 x86_sys.pc.attachIO(x86_sys.iobus)
302
303def connectX86RubySystem(x86_sys):
304 # North Bridge
305 x86_sys.piobus = Bus(bus_id=0)
306
307 #
308 # Pio functional accesses from devices need direct access to memory
309 # RubyPort currently does support functional accesses. Therefore provide
310 # the piobus a direct connection to physical memory
311 #
312 x86_sys.piobus.port = x86_sys.physmem.port
313
314 x86_sys.pc.attachIO(x86_sys.piobus)
315
316
317def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False):
290 if self == None:
291 self = X86System()
292
293 if not mdesc:
294 # generic system
295 mdesc = SysConfig()
296 self.readfile = mdesc.script()
297
298 self.mem_mode = mem_mode
299
300 # Physical memory
318 if self == None:
319 self = X86System()
320
321 if not mdesc:
322 # generic system
323 mdesc = SysConfig()
324 self.readfile = mdesc.script()
325
326 self.mem_mode = mem_mode
327
328 # Physical memory
301 self.membus = MemBus(bus_id=1)
302 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
329 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
303 self.physmem.port = self.membus.port
304
330
305 # North Bridge
306 self.iobus = Bus(bus_id=0)
307 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
308 self.bridge.side_a = self.iobus.port
309 self.bridge.side_b = self.membus.port
310
311 # Platform
312 self.pc = Pc()
331 # Platform
332 self.pc = Pc()
313 self.pc.attachIO(self.iobus)
314
333
334 # Create and connect the busses required by each memory system
335 if Ruby:
336 connectX86RubySystem(self)
337 else:
338 connectX86ClassicSystem(self)
339
315 self.intrctrl = IntrControl()
316
317 # Disks
318 disk0 = CowIdeDisk(driveID='master')
319 disk2 = CowIdeDisk(driveID='master')
320 disk0.childImage(mdesc.disk())
321 disk2.childImage(disk('linux-bigswap2.img'))
322 self.pc.south_bridge.ide.disks = [disk0, disk2]

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375 dest_io_apic_id = io_apic.id,
376 dest_io_apic_intin = apicPin)
377 self.intel_mp_table.add_entry(assign_to_apic)
378 assignISAInt(0, 2)
379 assignISAInt(1, 1)
380 for i in range(3, 15):
381 assignISAInt(i, i)
382
340 self.intrctrl = IntrControl()
341
342 # Disks
343 disk0 = CowIdeDisk(driveID='master')
344 disk2 = CowIdeDisk(driveID='master')
345 disk0.childImage(mdesc.disk())
346 disk2.childImage(disk('linux-bigswap2.img'))
347 self.pc.south_bridge.ide.disks = [disk0, disk2]

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400 dest_io_apic_id = io_apic.id,
401 dest_io_apic_intin = apicPin)
402 self.intel_mp_table.add_entry(assign_to_apic)
403 assignISAInt(0, 2)
404 assignISAInt(1, 1)
405 for i in range(3, 15):
406 assignISAInt(i, i)
407
383
384def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None):
408def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None, Ruby = False):
385 self = LinuxX86System()
386
409 self = LinuxX86System()
410
387 # Build up a generic x86 system and then specialize it for Linux
388 makeX86System(mem_mode, numCPUs, mdesc, self)
411 # Build up the x86 system and then specialize it for Linux
412 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby)
389
390 # We assume below that there's at least 1MB of memory. We'll require 2
391 # just to avoid corner cases.
392 assert(self.physmem.range.second.getValue() >= 0x200000)
393
394 # Mark the first megabyte of memory as reserved
395 self.e820_table.entries.append(X86E820Entry(
396 addr = 0,

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414 # We assume below that there's at least 1MB of memory. We'll require 2
415 # just to avoid corner cases.
416 assert(self.physmem.range.second.getValue() >= 0x200000)
417
418 # Mark the first megabyte of memory as reserved
419 self.e820_table.entries.append(X86E820Entry(
420 addr = 0,

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