FSConfig.py (5918:c3d88393a1f3) FSConfig.py (6044:3b23e5fc76e4)
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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218 subtractive_decode=True, parent_bus=1)
219 self.intel_mp_table.add_entry(connect_busses)
220 pci_dev4_inta = X86IntelMPIOIntAssignment(
221 interrupt_type = 'INT',
222 polarity = 'ConformPolarity',
223 trigger = 'ConformTrigger',
224 source_bus_id = 1,
225 source_bus_irq = 0 + (4 << 2),
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 209 unchanged lines hidden (view full) ---

218 subtractive_decode=True, parent_bus=1)
219 self.intel_mp_table.add_entry(connect_busses)
220 pci_dev4_inta = X86IntelMPIOIntAssignment(
221 interrupt_type = 'INT',
222 polarity = 'ConformPolarity',
223 trigger = 'ConformTrigger',
224 source_bus_id = 1,
225 source_bus_irq = 0 + (4 << 2),
226 dest_io_apic_id = 1,
226 dest_io_apic_id = io_apic.id,
227 dest_io_apic_intin = 16)
228 assign_8259_0_to_apic = X86IntelMPIOIntAssignment(
229 interrupt_type = 'ExtInt',
230 polarity = 'ConformPolarity',
231 trigger = 'ConformTrigger',
232 source_bus_id = 0,
233 source_bus_irq = 0,
227 dest_io_apic_intin = 16)
228 assign_8259_0_to_apic = X86IntelMPIOIntAssignment(
229 interrupt_type = 'ExtInt',
230 polarity = 'ConformPolarity',
231 trigger = 'ConformTrigger',
232 source_bus_id = 0,
233 source_bus_irq = 0,
234 dest_io_apic_id = 1,
234 dest_io_apic_id = io_apic.id,
235 dest_io_apic_intin = 0)
236 self.intel_mp_table.add_entry(assign_8259_0_to_apic)
237 assign_0_to_apic = X86IntelMPIOIntAssignment(
238 interrupt_type = 'INT',
239 polarity = 'ConformPolarity',
240 trigger = 'ConformTrigger',
241 source_bus_id = 0,
242 source_bus_irq = 0,
235 dest_io_apic_intin = 0)
236 self.intel_mp_table.add_entry(assign_8259_0_to_apic)
237 assign_0_to_apic = X86IntelMPIOIntAssignment(
238 interrupt_type = 'INT',
239 polarity = 'ConformPolarity',
240 trigger = 'ConformTrigger',
241 source_bus_id = 0,
242 source_bus_irq = 0,
243 dest_io_apic_id = 1,
243 dest_io_apic_id = io_apic.id,
244 dest_io_apic_intin = 2)
245 self.intel_mp_table.add_entry(assign_0_to_apic)
246 assign_8259_1_to_apic = X86IntelMPIOIntAssignment(
247 interrupt_type = 'ExtInt',
248 polarity = 'ConformPolarity',
249 trigger = 'ConformTrigger',
250 source_bus_id = 0,
251 source_bus_irq = 1,
244 dest_io_apic_intin = 2)
245 self.intel_mp_table.add_entry(assign_0_to_apic)
246 assign_8259_1_to_apic = X86IntelMPIOIntAssignment(
247 interrupt_type = 'ExtInt',
248 polarity = 'ConformPolarity',
249 trigger = 'ConformTrigger',
250 source_bus_id = 0,
251 source_bus_irq = 1,
252 dest_io_apic_id = 1,
252 dest_io_apic_id = io_apic.id,
253 dest_io_apic_intin = 0)
254 self.intel_mp_table.add_entry(assign_8259_1_to_apic)
255 assign_1_to_apic = X86IntelMPIOIntAssignment(
256 interrupt_type = 'INT',
257 polarity = 'ConformPolarity',
258 trigger = 'ConformTrigger',
259 source_bus_id = 0,
260 source_bus_irq = 1,
253 dest_io_apic_intin = 0)
254 self.intel_mp_table.add_entry(assign_8259_1_to_apic)
255 assign_1_to_apic = X86IntelMPIOIntAssignment(
256 interrupt_type = 'INT',
257 polarity = 'ConformPolarity',
258 trigger = 'ConformTrigger',
259 source_bus_id = 0,
260 source_bus_irq = 1,
261 dest_io_apic_id = 1,
261 dest_io_apic_id = io_apic.id,
262 dest_io_apic_intin = 1)
263 self.intel_mp_table.add_entry(assign_1_to_apic)
264 assign_8259_4_to_apic = X86IntelMPIOIntAssignment(
265 interrupt_type = 'ExtInt',
266 polarity = 'ConformPolarity',
267 trigger = 'ConformTrigger',
268 source_bus_id = 0,
269 source_bus_irq = 4,
262 dest_io_apic_intin = 1)
263 self.intel_mp_table.add_entry(assign_1_to_apic)
264 assign_8259_4_to_apic = X86IntelMPIOIntAssignment(
265 interrupt_type = 'ExtInt',
266 polarity = 'ConformPolarity',
267 trigger = 'ConformTrigger',
268 source_bus_id = 0,
269 source_bus_irq = 4,
270 dest_io_apic_id = 1,
270 dest_io_apic_id = io_apic.id,
271 dest_io_apic_intin = 0)
272 self.intel_mp_table.add_entry(assign_8259_4_to_apic)
273 assign_4_to_apic = X86IntelMPIOIntAssignment(
274 interrupt_type = 'INT',
275 polarity = 'ConformPolarity',
276 trigger = 'ConformTrigger',
277 source_bus_id = 0,
278 source_bus_irq = 4,
271 dest_io_apic_intin = 0)
272 self.intel_mp_table.add_entry(assign_8259_4_to_apic)
273 assign_4_to_apic = X86IntelMPIOIntAssignment(
274 interrupt_type = 'INT',
275 polarity = 'ConformPolarity',
276 trigger = 'ConformTrigger',
277 source_bus_id = 0,
278 source_bus_irq = 4,
279 dest_io_apic_id = 1,
279 dest_io_apic_id = io_apic.id,
280 dest_io_apic_intin = 4)
281 self.intel_mp_table.add_entry(assign_4_to_apic)
282 assign_8259_12_to_apic = X86IntelMPIOIntAssignment(
283 interrupt_type = 'ExtInt',
284 polarity = 'ConformPolarity',
285 trigger = 'ConformTrigger',
286 source_bus_id = 0,
287 source_bus_irq = 12,
280 dest_io_apic_intin = 4)
281 self.intel_mp_table.add_entry(assign_4_to_apic)
282 assign_8259_12_to_apic = X86IntelMPIOIntAssignment(
283 interrupt_type = 'ExtInt',
284 polarity = 'ConformPolarity',
285 trigger = 'ConformTrigger',
286 source_bus_id = 0,
287 source_bus_irq = 12,
288 dest_io_apic_id = 1,
288 dest_io_apic_id = io_apic.id,
289 dest_io_apic_intin = 0)
290 self.intel_mp_table.add_entry(assign_8259_12_to_apic)
291 assign_12_to_apic = X86IntelMPIOIntAssignment(
292 interrupt_type = 'INT',
293 polarity = 'ConformPolarity',
294 trigger = 'ConformTrigger',
295 source_bus_id = 0,
296 source_bus_irq = 12,
289 dest_io_apic_intin = 0)
290 self.intel_mp_table.add_entry(assign_8259_12_to_apic)
291 assign_12_to_apic = X86IntelMPIOIntAssignment(
292 interrupt_type = 'INT',
293 polarity = 'ConformPolarity',
294 trigger = 'ConformTrigger',
295 source_bus_id = 0,
296 source_bus_irq = 12,
297 dest_io_apic_id = 1,
297 dest_io_apic_id = io_apic.id,
298 dest_io_apic_intin = 12)
299 self.intel_mp_table.add_entry(assign_12_to_apic)
300 assign_8259_14_to_apic = X86IntelMPIOIntAssignment(
301 interrupt_type = 'ExtInt',
302 polarity = 'ConformPolarity',
303 trigger = 'ConformTrigger',
304 source_bus_id = 0,
305 source_bus_irq = 14,
298 dest_io_apic_intin = 12)
299 self.intel_mp_table.add_entry(assign_12_to_apic)
300 assign_8259_14_to_apic = X86IntelMPIOIntAssignment(
301 interrupt_type = 'ExtInt',
302 polarity = 'ConformPolarity',
303 trigger = 'ConformTrigger',
304 source_bus_id = 0,
305 source_bus_irq = 14,
306 dest_io_apic_id = 1,
306 dest_io_apic_id = io_apic.id,
307 dest_io_apic_intin = 0)
308 self.intel_mp_table.add_entry(assign_8259_14_to_apic)
309 assign_14_to_apic = X86IntelMPIOIntAssignment(
310 interrupt_type = 'INT',
311 polarity = 'ConformPolarity',
312 trigger = 'ConformTrigger',
313 source_bus_id = 0,
314 source_bus_irq = 14,
307 dest_io_apic_intin = 0)
308 self.intel_mp_table.add_entry(assign_8259_14_to_apic)
309 assign_14_to_apic = X86IntelMPIOIntAssignment(
310 interrupt_type = 'INT',
311 polarity = 'ConformPolarity',
312 trigger = 'ConformTrigger',
313 source_bus_id = 0,
314 source_bus_irq = 14,
315 dest_io_apic_id = 1,
315 dest_io_apic_id = io_apic.id,
316 dest_io_apic_intin = 14)
317 self.intel_mp_table.add_entry(assign_14_to_apic)
318
319
320def makeLinuxX86System(mem_mode, mdesc = None):
321 self = LinuxX86System()
322
323 # Build up a generic x86 system and then specialize it for Linux

--- 107 unchanged lines hidden --- 		316 dest_io_apic_intin = 14)
317 self.intel_mp_table.add_entry(assign_14_to_apic)
318
319
320def makeLinuxX86System(mem_mode, mdesc = None):
321 self = LinuxX86System()
322
323 # Build up a generic x86 system and then specialize it for Linux

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