FSConfig.py (5841:08c65e29e57e) FSConfig.py (5843:a2c317cefcf8)
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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207 io_apic = X86IntelMPIOAPIC(
208 id = 1,
209 version = 0x11,
210 enable = True,
211 address = 0xfec00000)
212 self.intel_mp_table.add_entry(io_apic)
213 isa_bus = X86IntelMPBus(bus_id = 0, bus_type='ISA')
214 self.intel_mp_table.add_entry(isa_bus)
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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207 io_apic = X86IntelMPIOAPIC(
208 id = 1,
209 version = 0x11,
210 enable = True,
211 address = 0xfec00000)
212 self.intel_mp_table.add_entry(io_apic)
213 isa_bus = X86IntelMPBus(bus_id = 0, bus_type='ISA')
214 self.intel_mp_table.add_entry(isa_bus)
215 pci_bus = X86IntelMPBus(bus_id = 1, bus_type='PCI')
216 self.intel_mp_table.add_entry(pci_bus)
217 connect_busses = X86IntelMPBusHierarchy(bus_id=0,
218 subtractive_decode=True, parent_bus=1)
219 self.intel_mp_table.add_entry(connect_busses)
220 pci_dev4_inta = X86IntelMPIOIntAssignment(
221 interrupt_type = 'INT',
222 polarity = 'ConformPolarity',
223 trigger = 'ConformTrigger',
224 source_bus_id = 1,
225 source_bus_irq = 0 + (4 << 2),
226 dest_io_apic_id = 1,
227 dest_io_apic_intin = 16)
215 assign_8259_0_to_apic = X86IntelMPIOIntAssignment(
216 interrupt_type = 'ExtInt',
217 polarity = 'ConformPolarity',
218 trigger = 'ConformTrigger',
219 source_bus_id = 0,
220 source_bus_irq = 0,
221 dest_io_apic_id = 1,
222 dest_io_apic_intin = 0)

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261 interrupt_type = 'INT',
262 polarity = 'ConformPolarity',
263 trigger = 'ConformTrigger',
264 source_bus_id = 0,
265 source_bus_irq = 12,
266 dest_io_apic_id = 1,
267 dest_io_apic_intin = 12)
268 self.intel_mp_table.add_entry(assign_12_to_apic)
228 assign_8259_0_to_apic = X86IntelMPIOIntAssignment(
229 interrupt_type = 'ExtInt',
230 polarity = 'ConformPolarity',
231 trigger = 'ConformTrigger',
232 source_bus_id = 0,
233 source_bus_irq = 0,
234 dest_io_apic_id = 1,
235 dest_io_apic_intin = 0)

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274 interrupt_type = 'INT',
275 polarity = 'ConformPolarity',
276 trigger = 'ConformTrigger',
277 source_bus_id = 0,
278 source_bus_irq = 12,
279 dest_io_apic_id = 1,
280 dest_io_apic_intin = 12)
281 self.intel_mp_table.add_entry(assign_12_to_apic)
282 assign_8259_14_to_apic = X86IntelMPIOIntAssignment(
283 interrupt_type = 'ExtInt',
284 polarity = 'ConformPolarity',
285 trigger = 'ConformTrigger',
286 source_bus_id = 0,
287 source_bus_irq = 14,
288 dest_io_apic_id = 1,
289 dest_io_apic_intin = 0)
290 self.intel_mp_table.add_entry(assign_8259_14_to_apic)
291 assign_14_to_apic = X86IntelMPIOIntAssignment(
292 interrupt_type = 'INT',
293 polarity = 'ConformPolarity',
294 trigger = 'ConformTrigger',
295 source_bus_id = 0,
296 source_bus_irq = 14,
297 dest_io_apic_id = 1,
298 dest_io_apic_intin = 14)
299 self.intel_mp_table.add_entry(assign_14_to_apic)
269
270
271def makeLinuxX86System(mem_mode, mdesc = None):
272 self = LinuxX86System()
273
274 # Build up a generic x86 system and then specialize it for Linux
275 makeX86System(mem_mode, mdesc, self)
276

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301
302def makeLinuxX86System(mem_mode, mdesc = None):
303 self = LinuxX86System()
304
305 # Build up a generic x86 system and then specialize it for Linux
306 makeX86System(mem_mode, mdesc, self)
307

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