| FSConfig.py (5478:ca055528a3b3) | FSConfig.py (5613:0d14611ee1bb) |
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| 1# Copyright (c) 2006-2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 145 unchanged lines hidden (view full) --- 154 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' 155 156 return self 157 158def x86IOAddress(port): 159 IO_address_space_base = 0x8000000000000000 160 return IO_address_space_base + port; 161 | 1# Copyright (c) 2006-2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 145 unchanged lines hidden (view full) --- 154 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' 155 156 return self 157 158def x86IOAddress(port): 159 IO_address_space_base = 0x8000000000000000 160 return IO_address_space_base + port; 161 |
| 162def makeLinuxX86System(mem_mode, mdesc = None): 163 self = LinuxX86System() | 162def makeX86System(mem_mode, mdesc = None, self = None): 163 if self == None: 164 self = X86System() 165 |
| 164 if not mdesc: 165 # generic system 166 mdesc = SysConfig() 167 self.readfile = mdesc.script() 168 169 # Physical memory 170 self.membus = Bus(bus_id=1) 171 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem())) 172 self.physmem.port = self.membus.port 173 | 166 if not mdesc: 167 # generic system 168 mdesc = SysConfig() 169 self.readfile = mdesc.script() 170 171 # Physical memory 172 self.membus = Bus(bus_id=1) 173 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem())) 174 self.physmem.port = self.membus.port 175 |
| 176 # North Bridge 177 self.iobus = Bus(bus_id=0) 178 self.bridge = Bridge(delay='50ns', nack_delay='4ns') 179 self.bridge.side_a = self.iobus.port 180 self.bridge.side_b = self.membus.port 181 182 # Platform 183 self.pc = PC() 184 self.pc.attachIO(self.iobus) 185 186 self.intrctrl = IntrControl() 187 188 189def makeLinuxX86System(mem_mode, mdesc = None): 190 self = LinuxX86System() 191 192 # Build up a generic x86 system and then specialize it for Linux 193 makeX86System(mem_mode, mdesc, self) 194 |
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| 174 # We assume below that there's at least 1MB of memory. We'll require 2 175 # just to avoid corner cases. 176 assert(self.physmem.range.second >= 0x200000) 177 178 # Mark the first megabyte of memory as reserved 179 self.e820_table.entries.append(X86E820Entry( 180 addr = 0, 181 size = '1MB', 182 range_type = 2)) 183 184 # Mark the rest as available 185 self.e820_table.entries.append(X86E820Entry( 186 addr = 0x100000, 187 size = '%dB' % (self.physmem.range.second - 0x100000 - 1), 188 range_type = 1)) 189 | 195 # We assume below that there's at least 1MB of memory. We'll require 2 196 # just to avoid corner cases. 197 assert(self.physmem.range.second >= 0x200000) 198 199 # Mark the first megabyte of memory as reserved 200 self.e820_table.entries.append(X86E820Entry( 201 addr = 0, 202 size = '1MB', 203 range_type = 2)) 204 205 # Mark the rest as available 206 self.e820_table.entries.append(X86E820Entry( 207 addr = 0x100000, 208 size = '%dB' % (self.physmem.range.second - 0x100000 - 1), 209 range_type = 1)) 210 |
| 190 # North Bridge 191 self.iobus = Bus(bus_id=0) 192 self.bridge = Bridge(delay='50ns', nack_delay='4ns') 193 self.bridge.side_a = self.iobus.port 194 self.bridge.side_b = self.membus.port 195 | |
| 196 # Command line 197 self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=9608015' 198 | 211 # Command line 212 self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=9608015' 213 |
| 199 # Platform 200 self.pc = PC() 201 self.pc.attachIO(self.iobus) 202 203 self.intrctrl = IntrControl() 204 | |
| 205 return self 206 207 208def makeDualRoot(testSystem, driveSystem, dumpfile): 209 self = Root() 210 self.testsys = testSystem 211 self.drivesys = driveSystem 212 self.etherlink = EtherLink() --- 78 unchanged lines hidden --- | 214 return self 215 216 217def makeDualRoot(testSystem, driveSystem, dumpfile): 218 self = Root() 219 self.testsys = testSystem 220 self.drivesys = driveSystem 221 self.etherlink = EtherLink() --- 78 unchanged lines hidden --- |