FSConfig.py (5357:eecb5fd0be62) | FSConfig.py (5389:215d8a8c97df) |
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1# Copyright (c) 2006-2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 163 unchanged lines hidden (view full) --- 172 self.physmem.port = self.membus.port 173 174 # North Bridge 175 self.iobus = Bus(bus_id=0) 176 self.bridge = Bridge(delay='50ns', nack_delay='4ns') 177 self.bridge.side_a = self.iobus.port 178 self.bridge.side_b = self.membus.port 179 | 1# Copyright (c) 2006-2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 163 unchanged lines hidden (view full) --- 172 self.physmem.port = self.membus.port 173 174 # North Bridge 175 self.iobus = Bus(bus_id=0) 176 self.bridge = Bridge(delay='50ns', nack_delay='4ns') 177 self.bridge.side_a = self.iobus.port 178 self.bridge.side_b = self.membus.port 179 |
180 # Serial port and console 181 self.console = SimConsole() 182 self.com_1 = Uart8250() 183 self.com_1.pio_addr = x86IOAddress(0x3f8) 184 self.com_1.pio = self.iobus.port 185 self.com_1.sim_console = self.console 186 | |
187 # Command line 188 self.boot_osflags = 'earlyprintk=ttyS0' 189 190 # Platform | 180 # Command line 181 self.boot_osflags = 'earlyprintk=ttyS0' 182 183 # Platform |
191 self.opteron = Opteron() 192 self.opteron.attachIO(self.iobus) | 184 self.pc = PC() 185 self.pc.attachIO(self.iobus) |
193 194 self.intrctrl = IntrControl() 195 196 return self 197 198 199def makeDualRoot(testSystem, driveSystem, dumpfile): 200 self = Root() --- 81 unchanged lines hidden --- | 186 187 self.intrctrl = IntrControl() 188 189 return self 190 191 192def makeDualRoot(testSystem, driveSystem, dumpfile): 193 self = Root() --- 81 unchanged lines hidden --- |