FSConfig.py (2998:1d5ea4e433f5) FSConfig.py (3005:ceb86e85d62d)
1# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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41
42class BaseTsunami(Tsunami):
43 ethernet = NSGigE(configdata=NSGigEPciData(),
44 pci_bus=0, pci_dev=1, pci_func=0)
45 etherint = NSGigEInt(device=Parent.ethernet)
46 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
47 pci_func=0, pci_dev=0, pci_bus=0)
48
1# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 32 unchanged lines hidden (view full) ---

41
42class BaseTsunami(Tsunami):
43 ethernet = NSGigE(configdata=NSGigEPciData(),
44 pci_bus=0, pci_dev=1, pci_func=0)
45 etherint = NSGigEInt(device=Parent.ethernet)
46 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
47 pci_func=0, pci_dev=0, pci_bus=0)
48
49def makeLinuxAlphaSystem(mem_mode, mdesc):
49def makeLinuxAlphaSystem(mem_mode, mdesc = None):
50 self = LinuxAlphaSystem()
50 self = LinuxAlphaSystem()
51 if not mdesc:
52 # generic system
53 mdesc = Machine()
51 self.readfile = mdesc.script()
52 self.iobus = Bus(bus_id=0)
53 self.membus = Bus(bus_id=1)
54 self.bridge = Bridge()
55 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
56 self.bridge.side_a = self.iobus.port
57 self.bridge.side_b = self.membus.port
58 self.physmem.port = self.membus.port

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54 self.readfile = mdesc.script()
55 self.iobus = Bus(bus_id=0)
56 self.membus = Bus(bus_id=1)
57 self.bridge = Bridge()
58 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
59 self.bridge.side_a = self.iobus.port
60 self.bridge.side_b = self.membus.port
61 self.physmem.port = self.membus.port

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